Hot-electron hardened Si-gate MOSFET utilizing F implantation

Nishioka, Yasushiro; Ohyu, K.; Ohji, Yuzuru; Natuaki, N.; Mukai, K.; Ma, T.P.

doi:10.1109/55.31697

Cited by 102 publications

(22 citation statements)

References 7 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…The fluorine saturation of the Si/Si0 2 interface improves the hot electron hardness [5] and has a remarkable influence on the negative bias temperature instability (NBTI) in MOS devices [6]. NBTI is explained by an increase of the trap density at the Si/SiO 2 interface and an increase in the fixed positive oxide charge within the gate oxide.…”

Section: Stress Behavior Of Logic Devicesmentioning

confidence: 99%

The Influence of Fluorine on Various Mos Devices

et al. 1999

View full text Add to dashboard Cite

The influence of Vapor Phase Precleans leads to a different controllable fluorine content within the subsequently grown dielectric. The influence of the clean is discussed for non-volatile memory devices, advanced MOS transistors and ultra thin gate dielectrics. On the one hand, the Qw values for in situ cleaned samples are lower than for wet cleaned samples. Performing cycle stress on the EEPROM devices, the tunnel oxide (7.5nm) degrades the quicker with the increase in fluorine concentration within the oxide. On the other hand, MOS transistor characteristics show a significant improvement on the negative bias temperature instability (NBTI) in the PMOS threshold voltage. MOS transistors with ultra thin gate dielectrics (1.5nm) show the expected significant increase of the saturation current compared with 0.35gm technology (to 0 -=7.5nm). Excellent times until soft breakdown for ultra thin dielectrics are found when the in situ cleaning is used.

show abstract

Section: Stress Behavior Of Logic Devicesmentioning

confidence: 99%

The Influence of Fluorine on Various Mos Devices

et al. 1999

View full text Add to dashboard Cite

show abstract

“…Adding H20 to the solution produces the reaction shown in Eq. 2 [SiF6 9 SiF4] 2-+ 2H20 ---> SiF4(OH)~-+ SiF4 + 2HF [2] The reaction of SiF4(OH)~-with H § in the acidic immersion solution is shown in Eq. 3…”

Section: Methodsmentioning

confidence: 99%

Controlling Fluorine Concentration and Thermal Annealing Effect on Liquid‐Phase Deposited SiO2 − x F x Films

Yeh

Chen

1995

J. Electrochem. Soc.

View full text Add to dashboard Cite

Silicon oxide (SiO2_=F~) with fluorine naturally incorporated can be prepared by the liquid-phase deposition (LPD) method at 15~ The fluorine is uniformly distributed in the bulk of the LPD oxide. The fluorine incorporation as well as the qualitative properties can be accurately controlled by varying the amount of H20 added. A high temperature process has considerable effect on the low temperature fluorinated oxide. FTIR and XPS spectra show that Si-F and SiO~H bonds can restructure with densification at higher thermal annealing temperature, and that restructuring is a function of temperature. Film densification with increasing temperature is also discussed in terms of St-O-St bond angle and Si~Si bond length.

show abstract

“…1 On the other hand, F incorporation has been thought to enhance hot carrier immunity. [2][3][4] Recently, it was found that a reduction of F incorporation resulting from the WF 6 deposition process of WSi x has a significant effect on oxide reliability in dynamic random access memories ͑DRAMs͒. 5 Gate oxide integrity investigations have shown that the time to breakdown t bd can be improved by about 30% by the reduction of extremely high F concentrations.…”

Section: Fluorine Incorporation Into Gate Stacks Of Advanced Silicon mentioning

confidence: 99%

Fluorine incorporation into gate stacks of advanced silicon memory technologies: Simulation, depth distribution, and reliability

Krüger

Dąbrowski

Gaworzewski

et al. 2001

Journal of Applied Physics

View full text Add to dashboard Cite

Fluorine segregation influences the intrinsic reliability of thin gate oxides in poly-Si/SiO 2 /Si structures. We analyze diffusion and segregation kinetics of F in gate stacks with 5 nm gate oxides using secondary ion mass spectroscopy. Well defined doses of F were introduced by ion implantation. We find that F segregation at interfaces to the gate oxide is diffusion limited with an effective activation energy of 1.4 eV. For F concentrations lower than 5ϫ10 15 cm Ϫ2 , F segregation is beneficial improving, for example, the tails of the Weibull plots and slightly increasing the breakdown field. For F doses higher than 1ϫ10 16 cm Ϫ2 , detrimental consequences were found, degrading the charge to breakdown values by about a factor of 5 after long-term thermal treatments. From ab initio density functional theory pseudopotential calculations for atomic structures and total energies of segregated F, we conclude that the segregation to the interface is driven mainly by the energy difference between Si-O and Si-Si bonds in the interfacial region, by oxygen assisted strain relaxation around Si atoms attacked by F and, possibly, by kinetic bottlenecks in diffusion of network oxygen through SiO 2 .

show abstract

Hot-electron hardened Si-gate MOSFET utilizing F implantation

Cited by 102 publications

References 7 publications

The Influence of Fluorine on Various Mos Devices

The Influence of Fluorine on Various Mos Devices

Controlling Fluorine Concentration and Thermal Annealing Effect on Liquid‐Phase Deposited SiO2 − x F x Films

Fluorine incorporation into gate stacks of advanced silicon memory technologies: Simulation, depth distribution, and reliability

Contact Info

Product

Resources

About