How bit-vector logic can help improve the verification of LTL specifications over infinite domains

Baresi, Luciano; Kallehbasti, Mohammad Mehdi Pourhashem; Rossi, Matteo

doi:10.1145/2851613.2851833

Cited by 6 publications

(14 citation statements)

References 23 publications

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“…Zot 20 encodes satisfiability (and validity) problems for discrete-time TRIO formulae as propositional satisfiability (SAT) problems, which are then checked with off-the-shelf SAT solvers. More recently, we developed more efficient encodings that exploit the features of Satisfiability Modulo Theories (SMT) solvers [Baresi et al 2016;. Through Zot one can verify whether stated properties hold for the modeled system (or parts thereof) or not; if a property does not hold, Zot produces a counterexample that violates it.…”

Section: Discussionmentioning

confidence: 99%

A Logic-Based Approach for the Verification of UML Timed Models

Baresi

Morzenti

Motta

et al. 2017

ACM Trans. Softw. Eng. Methodol.

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This paper presents a novel technique to formally verify models of real-time systems captured through a set of heterogeneous UML diagrams. The technique is based on the following key elements: (i) a subset of UML diagrams, called C-UML, which allows designers to describe the components of the system and their behavior through several kinds of diagrams (e.g., state machine diagrams, sequence diagrams, activity diagrams, interaction overview diagrams), and stereotypes taken from the UML MARTE profile; (ii) a formal semantics of C-UML diagrams, defined through formulae of the metric temporal logic TRIO; (iii) a tool, called Corretto, which implements the aforementioned semantics and allows users to carry out formal verification tasks on modeled systems. We validate the feasibility of our approach through a set of different case studies, taken from both the academic and the industrial domain. CCS Concepts: •Software and its engineering → Model-driven software engineering; Model checking; Unified Modeling Language (UML);

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Section: Discussionmentioning

confidence: 99%

A Logic-Based Approach for the Verification of UML Timed Models

Baresi

Morzenti

Motta

et al. 2017

ACM Trans. Softw. Eng. Methodol.

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“…The satisfiability problem CLTLoc is decidable [BRS16] and can be computed through a Bounded Satisfiability Checking approach [BRS16,BPKR16]. In Sect.…”

Section: Constraint Ltl Over Clocksmentioning

confidence: 99%

Using formal verification to evaluate theexecution time of Spark applications

et al. 2020

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Apache Spark is probably the most widely adopted framework for developing big-data batch applications and for executing them on a cluster of (virtual) machines. In general, the more resources (machines) one uses, the faster applications execute, but there is currently no adequate means to determine the proper size of a Spark cluster given time constraints, or to foresee execution times given the number of employed machines. One can only run these applications and use her/his experience to size the cluster and predict expected execution times. Wrong estimation of execution times can lead to costly overruns and overly long executions, thus calling for analytic sizing/prediction techniques that provide precise time guarantees. This paper addresses this problem by proposing a solution based on model-checking. The approach exploits a Directed Acyclic Graph (DAG) to abstract the structure of the execution flows of Spark programs, annotates each node (Spark stage) with execution-related data, and formulates the identification of the global execution time as a reachability problem. To avoid the well-known state space explosion problem, the paper also proposes a technique to reduce the size of generated abstract models. This results in a significant decrease in used memory and/or verification time making our approach feasible for predicting the execution time of Spark applications given the resources available. The benefits of the proposed reduction technique are evaluated by using both Timed Automata and Constraint LTL over clocks (CLTLoc) logic to formally encode and analyze generated models. The approach is also successfully validated on some realistic case studies. Since the optimization is not Spark-specific, we claim that it can be applied to a wide range of applications whose underlying model can be abstracted as a DAG.

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“…The satisfiability problem CLTLoc is decidable [6] and can be practically computed through a Bounded Satisfiability Checking approach [6,3]. Conversely, CLTLoc with Presburger arithmetics is undecidable, since so is its subset without clocks, CLTL [11], as the unboundedness of the domain of the counters and modality X allow the logic to encode the computations of 2-counter machines.…”

Section: Constraint Ltl Over-clocksmentioning

confidence: 99%

“…3). Therefore, the technique introduced in [6,3] can still be exploited to solve the satisfiability problem for any instance of the model.…”

Section: Constraint Ltl Over-clocksmentioning

confidence: 99%

“…Hence, we based the formal model on CLTLoc, a metric temporal logic over dense time that extends LTL with atomic constraints on clock variables. CLTLoc is supported by formal verification tools which allow users to analyze formulae in an automated manner [6,3]. CLTLoc was also used-and extended-to model Storm topologies in [15]; this unified modeling and verification approach opens the possibility to analyze applications that are built upon heterogeneous building blocks, some tailored to stream processing, and others to batch processing.…”

Section: Introductionmentioning

confidence: 99%

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On the Timed Analysis of Big-Data Applications

Marconi

Quattrocchi

Baresi

et al. 2018

Lecture Notes in Computer Science

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Apache Spark is one of the best-known frameworks for executing big-data batch applications over a cluster of (virtual) machines. Defining the cluster (i.e., the number of machines and CPUs) to attain guarantees on the execution times (deadlines) of the application is indeed a trade-off between the cost of the infrastructure and the time needed to execute the application. Sizing the computational resources, in order to prevent cost overruns, can benefit from the use of formal models as a means to capture the execution time of applications. Our model of Spark applications, based on the CLTLoc logic, is defined by considering the directed acyclic graph around which Spark programs are organized, the number of available CPUs, the number of tasks elaborated by the application, and the average execution times of tasks. If the outcome of the analysis is positive, then the execution is feasible-that is, it can be completed within a given time span. The analysis tool has been implemented on top of the Zot formal verification tool. A preliminary evaluation shows that our model is sufficiently accurate: the formal analysis identifies execution times that are close (the error is less than 10%) to those obtained by actually running the applications.

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How bit-vector logic can help improve the verification of LTL specifications over infinite domains

Cited by 6 publications

References 23 publications

A Logic-Based Approach for the Verification of UML Timed Models

A Logic-Based Approach for the Verification of UML Timed Models

Using formal verification to evaluate theexecution time of Spark applications

On the Timed Analysis of Big-Data Applications

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