How Rapid is Rapid Prototyping? Analysis of ESPADON Programme Results

Abstract

<p/> <p>New methodologies, engineering processes, and support environments are beginning to emerge for embedded signal processing systems. The main objectives are to enable defence industry to field state-of-the-art products in less time and with lower costs, including retrofits and upgrades, based predominately on commercial off the shelf (COTS) components and the model-year concept. One of the cornerstones of the new methodologies is the concept of rapid prototyping. This is the ability to rapidly and seamlessly move from functional design to the architectural design to the implementation, through automatic code generation tools, onto real-time COTS test beds. In this paper, we try to quantify the term "rapid" and provide results, the metrics, from two independent benchmarks, a radar and sonar beamforming application subset. The metrics show that the rapid prototyping process may be sixteen times faster than a conventional process.</p

Final Statements

“…Alternative approaches, such as the Rhapsody and Statemate tools from I-Logix (Gery et al 2001, Hoffmann 2000 and Ptolemy Classic (Madahar et al 2003), offer code generation capabilities from various domain-specific high-level system descriptions. Whilst each of these approaches offer specific rapid implementation capabilities, none is a complete system level heterogeneous FPGA design solution.…”

Multidimensional DSP Core Synthesis for FPGA

“…Rapid heterogeneous DSP system implementation approaches such as GRAPE-II [4], Ptolemy [5], PEACE [6], Compaan/Laura [7] and GEDAE [2] all exhibit a number of common characteristics which are key enabling factors for rapid implementation and system level design capabilities. These have been encapsulated in the heterogeneous system design process outlined in Fig.…”

“…The ith entry in r describes the number of times actor ifires in a single iteration of the schedule, known as the granularity of actor i (G(i)). The minimum values of T and G for which (2) holds are the natural values T n and G n . For Fig.…”

“…For many years, embedded multiprocessor platforms have been targeted for implementation of digital signal processing (DSP) systems and thus, corresponding approaches for rapid implementation which transform a system algorithmic description to a working implementation, have emerged and matured [1,2]. The relatively recent emergence of programmable logic devices, in particular field programmable gate array (FPGA) as hosts for dedicated hardware for speed critical portions of the system, or complete system-on-programmablechip (SoPC) solutions poses new problems in the evolution of these rapid implementation approaches into true heterogeneous equivalents.…”