How to Deal with Substrate Bounce in Analog Circuits in Epi-Type CMOS Technology

Abstract

Substrate noise is one of the key problems in mixed analog/digital ICs. Although measures are known to reduce substrate noise, the noise will never be completely eliminated since this requires larger chip area or exotic packages and thus higher cost. Analog circuits on digital ICs simply have to be resistant to substrate noise. A general strategy is given which can be summarized as: the supply of the analog circuits must be referred to the substrate and the analog signals must be referred to a clean analog ground. Furthermore several design constraints are given to minimize the effect of substrate noise on analog. Two bandgap circuits are discussed and it is shown that apparently minor design issues, such as the connection of an n-well of a PMOS differential pair, can have large impact on the substrate sensitivity of this circuit. This has been verified by measurements.

High-accuracy charge-redistribution SC video bandpass filter in standard CMOS

“…These individual subcapacitors have their own set of switches so that the environment for the capacitor is imitated for each of the nine subcapacitors of for improved matching with process variations. It was mentioned in Section IV that has an effective capacitance of 271.2 fF, so that each individual capacitor has a value of 135.6 fF, whereas has a value of 2628 fF, giving each subcapacitor of a value of 146 fF or 1.077 The subcapacitors of Cb are constructed so that their area capacitance and edge capacitance are scaled by 1.077 with respect to Precautionary measures were taken in the design to help reduce pick-up from substrate feedthrough [30]. Separate analog and digital supplies are used, as well as replica biasing for the OTA's.…”

Multilevel finite difference methods for the characterization of substrate coupling in deep sub-micron designs

“…The design of such systems however, is becoming an increasingly difficult task owing to the various coupling problems that result from the combined requirements for high-speed digital and high-precision analog components. Noise coupling caused by the nonideal isolation provided by the common chip substrate has been identified as a significant contributor to the coupling problem in mixed-signal designs [1,2,3,4]. Fast switching logic components inject current into the substrate causing voltage fluctuation which can affect the operation of sensitive analog circuitry through the bodyeffect, since the transistor threshold is a strong function of substrate bias.…”

Efficient techniques for accurate modeling and simulation of substrate coupling in mixed-signal ICs

“…The design of such systems however, is becoming an increasingly difficult task owing to the various coupling problems that result from the combined requirements for high-speed digital and highprecision analog components. Noise coupling through the common chip substrate, caused by the nonideal isolation has been identified as a significant contributor to the coupling problem in mixed-signal designs [1,2,3,4]. Fast switching logic components inject current into the substrate causing voltage fluctuation which can affect the operation of sensitive analog circuitry through the body-effect, since the transistor threshold is a strong function of substrate bias.…”

“…Clearly such a methodology, is not adequate in the face of rising fabrication costs and increasing demands for shorter design cycle times [4]. Several approaches have been presented in the past to attempt to quantify the effects of noise coupling through the substrate.…”