1993
DOI: 10.1049/el:19931405
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i DD , pulse response testing: A unified approach to testing digital and analogue ICs

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Cited by 23 publications
(1 citation statement)
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“…In particular, the most likely faults (usually catastrophic) are anticipated based on a fault model, and a set of input stimuli and measurements are selected to detect faults. The measurements may be dc responses [51], ac responses at circuit outputs [52]- [55], ac responses at the power supply node [56], transient responses at circuit outputs [57], [58], or transient responses at the power supply node [59]. Then for the set of potential faults, the circuit's response for each stimulus is evaluated for each fault with all but the faulty parameter set to nominal values, i.e., the parameters for which the circuit was designed.…”
Section: A Simulation-before-testmentioning
confidence: 99%
“…In particular, the most likely faults (usually catastrophic) are anticipated based on a fault model, and a set of input stimuli and measurements are selected to detect faults. The measurements may be dc responses [51], ac responses at circuit outputs [52]- [55], ac responses at the power supply node [56], transient responses at circuit outputs [57], [58], or transient responses at the power supply node [59]. Then for the set of potential faults, the circuit's response for each stimulus is evaluated for each fault with all but the faulty parameter set to nominal values, i.e., the parameters for which the circuit was designed.…”
Section: A Simulation-before-testmentioning
confidence: 99%