2023
DOI: 10.1109/lmwt.2023.3288625
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Ka-/K-Band Frequency-Reconfigurable Single-Input Differential-Output Low-Noise Amplifier for 5G Applications

Abstract: This letter describes the design, analysis, and performance measurements of a K a-and K -band frequencyreconfigurable single-input differential-output (SIDO) low-noise amplifier (LNA) with a compact core size of 0.157 mm 2 . At 28 and 39 GHz, respectively, the noise figures of the LNA were 2.8 and 4.4 dB; it had high differential gains of 20.1 and 14.9 dB. The proposed LNA was fabricated using the 65-nm CMOS process. The LNA includes a two-stage common-source (CS) buffer amplifier to achieve low noise and an a… Show more

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Cited by 8 publications
(1 citation statement)
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“…It achieves a notable gain of 19.5 dB with an NF of 4.7 dB, but at the cost of high power consumption (59 mW). A single-ended-input, differential-output tunable K/Ka-band LNA operating at 28 and 39 GHz is demonstrated in a 65 nm CMOS in [ 42 ], maintaining a very low NF of 2.8 dB with a gain of 17.2 dB, yet with a very high power consumption of 28.5 mW. In [ 43 ], a 22 nm CMOS fully depleted-SOI low-power LNA with a single-stage cascode configuration is presented.…”
Section: Mosfet Characterization and Simulation Resultsmentioning
confidence: 99%
“…It achieves a notable gain of 19.5 dB with an NF of 4.7 dB, but at the cost of high power consumption (59 mW). A single-ended-input, differential-output tunable K/Ka-band LNA operating at 28 and 39 GHz is demonstrated in a 65 nm CMOS in [ 42 ], maintaining a very low NF of 2.8 dB with a gain of 17.2 dB, yet with a very high power consumption of 28.5 mW. In [ 43 ], a 22 nm CMOS fully depleted-SOI low-power LNA with a single-stage cascode configuration is presented.…”
Section: Mosfet Characterization and Simulation Resultsmentioning
confidence: 99%