Q -enhanced CMOS inductor using tapped-inductor feedback

Abstract

A Q-enhanced inductor using the tapped-inductor feedback technique is presented. Compared with conventional transformer feedback architectures, this proposed technique not only compensates for resistive losses with low power consumption but also provides a high-inductance inductor. The semi-passive inductor, which consists of an NMOS transistor, a capacitor, and a tapped inductor has been designed, implemented and verified in a standard 0.18 mm CMOS process. The measured resistance is about 1.0 V at 3 GHz, and the 3.9 nH semipassive inductor with a measured Q-peak of 74.2 around 3 GHz is also demonstrated. The semi-passive inductor draws 1.5 mA from a 0.8 V supply voltage while the chip size is 0.5 × 0.56 mm including all testing pads.Introduction: Most high-Q inductor techniques such as the silicon-oninsulator (SOI) or the micro-electromechanical system (MEMS) minimising resistive losses in the silicon substrate require special and additional CMOS processing [1, 2]. The peak Q-factor of these inductors in the non-standard CMOS process ranges between 20 and 40 which is successfully applied to an LC filter or VCO design. The inductors discussed above are all purely passive components since these inductors consist merely of metal lines without any active devices such as transistors. Therefore, a purely passive inductor usually consumes large chip area.Recently, many active inductors have taken advantage of CMOS transistors to realise superior Q-factors [3][4][5]. The main attributes of the inductors include their small size, high Q-factors compared with passive inductors, and that they can be a tunable design. However, the active inductor is a purely transistor-based technique, which has high power consumption. In addition to purely passive and active inductors, many semi-passive inductors consisting of MOS transistors and passive inductors or transformers have been presented [6][7][8]. The transformer feedback reported in [7,8] uses the magnetic coupling between primary and secondary inductors of the transformer and transistors to compensate for the resistive losses of the primary inductor. In this Letter, we improve the conventional transformer feedback architecture by using a tapped-inductor feedback technique. The proposed methodology demonstrates that the secondary inductor will contribute inductance and negative resistance directly of the equivalent inductor, and then achieve a high-Q and low-power inductor design.

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