IC for neural signal regeneration

Abstract

Based on the 4-channels neural signal regeneration system which was realized by using discrete devices and successfully used for in-vivo experiments of rats and rabbits, an integrated circuit (IC) with 6-channels of neural signal regeneration has been designed and realized in CSMC's 0.6Jlm CMOS technology. The IC consists of a neural signal amplifier with adjustable gain, a buffer stage, and a function electrical stimulation (FES) stage. The neural signal detecting circuit amplifies the detected weak signal come from the electrode to such a voltage that the FES circuit can be driven appropriately. The FES circuit amplifies the signal further so that the neural signal can be regenerated through the stimulating electrode. The neural signal regenerating IC occupies a die area of 2.82mm x 2.00mm. Under double supply voltages of ±2.5V, the DC power consumption is less than 50 mW. The on-wafer measurement results are as follows: the output resistor is 118 mn, the 3dB bandwidth is greater than 30 kHz, and the gain can be variable from 50dB to 90dB. The circuit has been used for in-vivo experiments on the rat's sciatic nerve as well as spinal cord with the cuff type electrode array or a needle twin-electrode, and the neural signal has been regenerated successfully both on a rat's sciatic nerve bundle and on a spinal cord.

A four-channel microelectronic system for neural signal regeneration

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