Identifying the sources of cache misses in Java programs without relying on hardware counters

InoueHiroshi,; NakataniToshio,

doi:10.1145/2426642.2259014

Cited by 4 publications

(5 citation statements)

References 28 publications

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“…Figure 10 shows the L2 and L3 Load Cache Misses Per Kilo Instruction (LCMPKI) for both configurations. As shown, the majority of the Dacapo benchmarks are not cache-missintensive, which corresponds with the previous findings [45]. Figure 13.…”

Section: A Characterization Of the Dacapo Benchmarkssupporting

confidence: 90%

MaxSim: A simulation platform for managed applications

Rodchenko

Kotselidis

Nisbet

et al. 2017

2017 IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS)

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Managed applications, written in programming languages such as Java, C# and others, represent a significant share of workloads in the mobile, desktop, and server domains. Microarchitectural timing simulation of such workloads is useful for characterization and performance analysis, of both hardware and software, as well as for research and development of novel hardware extensions. This paper introduces MaxSim, a simulation platform based on the Maxine VM, the ZSim simulator, and the McPAT modeling framework. MaxSim is able to simulate fast and accurately managed workloads running on top of Maxine VM and its capabilities are showcased with novel simulation techniques for: 1) low-intrusive microarchitectural profiling via pointer tagging on the x86-64 platforms, 2) modeling of hardware extensions related, but not limited to, tagged pointers, and 3) modeling of complex software changes via address-space morphing. Low-intrusive microarchitectural profiling is achieved by utilizing tagged pointers to collect type-and allocation-site-related hardware events. Furthermore, MaxSim allows, through a novel technique called address space morphing, the easy modeling of complex object layout transformations. Finally, through the codesigned capabilities of MaxSim, novel hardware extensions can be implemented and evaluated. We showcase MaxSim's capabilities by simulating the whole set of the DaCapo-9.12-bach benchmarks in less than a day while performing an up-to-date microarchitectural power and performance characterization. Furthermore, we demonstrate a hardware/software co-designed optimization that performs dynamic load elimination for array length retrieval achieving up to 14% L1 data cache loads reduction and up to 4% dynamic energy reduction. MaxSim is available at https://github.com/arodchen/ MaxSim released as free software.

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Section: A Characterization Of the Dacapo Benchmarkssupporting

confidence: 90%

MaxSim: A simulation platform for managed applications

Rodchenko

Kotselidis

Nisbet

et al. 2017

2017 IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS)

View full text Add to dashboard Cite

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“…Adaption of managed runtime There are a few works related to the management of hybrid memory particularly for managed applications [21][22][23][24][25][26]. Shuichi Oikawa's group conduct some preliminary work [21][22][23][24].…”

Section: Related Workmentioning

confidence: 99%

“…Besides, the process could result in a non-trivial execution overhead. Inoue et al [25] identify a code pattern in Java applications that can easily causing L1 and L2 cache misses. However, we find the number of memory accesses caused by this pattern is negligible.…”

Section: Related Workmentioning

confidence: 99%

Efficient Management for Hybrid Memory in Managed Language Runtime

Wang

Cao

Zigman

et al. 2016

Lecture Notes in Computer Science

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Hybrid memory, which leverages the benefits of traditional DRAM and emerging memory technologies, is a promising alternative for future main memory design. However popular management policies through memory-access recording and page migration may invoke non-trivial overhead in execution time and hardware space. Nowadays, managed language applications are increasingly dominant in every kind of platform. Managed runtimes provide services for automatic memory management. So it is important to adapt them for the underlying hybrid memory. This paper explores two opportunities, heap partition placement and object promotion, inside managed runtimes for allocating hot data in a fast memory space (fast-space) without any access recording or data migration overhead. For heap partition placement, we quantitatively analyze LLC miss density and performance effect for each partition. Results show that LLC misses especially store misses mostly hit nursery partitions. Placing nursery in fast-space, which is 20% total memory footprint of tested benchmarks on average, causes only 10% performance difference from all memory footprint in fast-space. During object promotion, hot objects will be directly allocated to fast-space. We develop a tool to analyze the LLC miss density for each method of workloads, since we have found that the LLC misses are mostly triggered by a small percentage of the total set of methods. The objects visited by the top-ranked methods are recognized as hot. Results show that hot objects do have higher access density, more than 3 times of random distribution for SPECjbb and pmd, and placing them in fast-space further reduces their execution time by 6% and 13% respectively.

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“…Inoue and Nakatani [36] identify code patterns in Java applications that can cause cache misses in L1 and L2. Gao et al [31] propose a framework including support from hardware, the OS, and the runtime to extend NVM's lifetime.…”

Section: Related Workmentioning

confidence: 99%

Unified Holistic Memory Management Supporting Multiple Big Data Processing Frameworks over Hybrid Memories

Chen

Zhao

Wang

et al. 2021

ACM Trans. Comput. Syst.

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To process real-world datasets, modern data-parallel systems often require extremely large amounts of memory, which are both costly and energy-inefficient. Emerging non-volatile memory (NVM) technologies offer high capacity compared to DRAM and low energy compared to SSDs. Hence, NVMs have the potential to fundamentally change the dichotomy between DRAM and durable storage in Big Data processing. However, most Big Data applications are written in managed languages and executed on top of a managed runtime that already performs various dimensions of memory management. Supporting hybrid physical memories adds in a new dimension, creating unique challenges in data replacement. This paper proposes Panthera, a semantics-aware, fully automated memory management technique for Big Data processing over hybrid memories. Panthera analyzes user programs on a Big Data system to infer their coarse-grained access patterns, which are then passed to the Panthera runtime for efficient data placement and migration. For Big Data applications, the coarse-grained data division information is accurate enough to guide the GC for data layout, which hardly incurs overhead in data monitoring and moving. We implemented Panthera in OpenJDK and Apache Spark. Based on Big Data applications’ memory access pattern, we also implemented a new profiling-guided optimization strategy, which is transparent to applications. With this optimization, our extensive evaluation demonstrates that Panthera reduces energy by 32 – 53% at less than 1% time overhead on average. To show Panthera’s applicability, we extend it to QuickCached, a pure Java implementation of Memcached. Our evaluation results show that Panthera reduces energy by 28.7% at 5.2% time overhead on average.

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Identifying the sources of cache misses in Java programs without relying on hardware counters

Cited by 4 publications

References 28 publications

MaxSim: A simulation platform for managed applications

MaxSim: A simulation platform for managed applications

Efficient Management for Hybrid Memory in Managed Language Runtime

Unified Holistic Memory Management Supporting Multiple Big Data Processing Frameworks over Hybrid Memories

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