IDSM: An improved disjoint signature monitoring scheme for processor behavioral checking

Fault tolerant electronic system design

“…In some cases the approach is combined with software modifications, which support the watchdog processor operation. The Disjoint Signature Monitoring (DSM) approach [35,15] solves these problems by storing reference signatures in an auxiliary memory and using a watchdog processor to compare the reference signatures with the run time signatures. This approach does not require support from the software program.…”

“…This approach does not require support from the software program. However, a drawback of the DSM approach is that the watchdog processor does not have access to the internal operation of the processor, which leads to a lower error coverage, particularly with complex processors [15].…”

“…Other methods, essentially based on an additional monitor processor, like the approaches presented in [35,15,13] require a large overhead of hardware resources to detect the soft errors; moreover, the detection capability is not independent from the application. Thus, not surprisingly, in these methods the error detection capability increases with the complexity of the additional hardware.…”

“…Another drawback of these methods is the difficulty in observing the processor behavior from the outside. In [15] a watchdog processor connected to the cache memory is used to detect soft errors. This watchdog processor uses a combination of techniques that are applied when a block ends or when frequent instructions are executed.…”

Radiation Testing of a Multiprocessor Macrosynchronized Lockstep Architecture With FreeRTOS

“…This last choice has been successfully applied to LEON3 microprocessor [11] and ARM A9 [12]. Other Hardware approaches use watchdog processors to observe the microprocessor behavior [13][14] High-end COTS microprocessors architecture can be explored to propose reliable solutions that meet the new requirements and provide high computational capability [15]. CNES (French National Centre for Space Studies, Centre National d'Études Spatiales) hardening architectures based in redundancy are a good example of it [16].…”