This paper deals with a new MRAM technology whose writing scheme relies on the Spin Orbit Torque (SOT). Compared to Spin Transfer Torque (STT) MRAM, it offers a very fast switching, a quasi-infinite endurance and improves the reliability by solving the issue of "read disturb", thanks to separate reading and writing paths. These properties allow introducing SOT at all-levels of the memory hierarchy of systems and adressing applications which could not be easily implemented by STT-MRAM. We present this emerging technology and a full design framework, allowing to design and simulate hybrid CMOS/SOT complex circuits at any level of abstraction, from device to system. The results obtained are very promising and show that this technology leads to a reduced power consumption of circuits without notable penalty in terms of performance.
Evaluating early at design time the level of security achieved with respect to fault-based hardware attacks requires understanding and accurately modeling the faults that can actually occur in a circuit under attack. Attacks with lasers can produce single or multiple-bit errors, while having a local impact in the circuit. This paper discusses several fault or error models that can be considered at design time and summarizes experimental results providing some insights into the consequences of the model chosen for evaluation.
Determining the dependability of integrated systems with respect to soft errors is necessary for a growing number of applications. The most critical information must be identified to achieve good efficiency/cost trade-offs when selective hardening is necessary. In processor-based systems, the most critical variables and registers must thus be identified for the target application program. An improved algorithm for critical register identification is described and compared to previous work. Fault injection results in a system based on Leon2 are also reported. They demonstrate the impact of micro-architectural characteristics on evaluating the real criticality of the register file. New refinements are suggested for further work based on data dependency analysis.
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