Image processing with high-speed and low-energy approximate arithmetic circuit

Mohammadi, Akram; Ghanatghestani, Mokhtar Mohammadi; Molahosseini, Amir Sabbagh; Mehrabani, Yavar Safaei

doi:10.1016/j.suscom.2022.100785

Cited by 3 publications

(1 citation statement)

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“…One of the major parts of arithmetic circuits is the adder circuit since other arithmetic operations can be designed using adder circuits. [7][8][9] Therefore, the adder efficiency principally determines the efficiency of the whole system. This can be considered as the most important reason for designing and improving the performance of adder circuits.…”

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confidence: 99%

A New Quaternary Full Adder Cell based on CNFET for Use in Fast Arithmetic Circuits

Bolourforoush¹,

Ghanatghestani²

2022

ECS J. Solid State Sci. Technol.

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Multi-valued logic potentially increases the efficiency of arithmetic circuits and digital ‎signal processing. Quaternary logic can be suggested as a solution to the problem of power ‎consumption and connection complexity in binary digital systems. The possibility of having ‎several threshold voltage levels using the carbon nanotube field-effect transistor ‎results in the widespread use of this technology in the design of multi-valued circuits. Here, a quaternary full adder cell is proposed. The main goal of the proposed circuit ‎is to reduce the critical delay path in the quaternary full adder circuit using a parallel ‎design. The proposed circuit is compared with four quaternary full adders based on ‎simulation results using HSPICE in 32 nm technology. The experimental results show the ‎higher performance of the proposed quaternary full adder cell than the state-of-the-art ‎designs.‎

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confidence: 99%