IMAPCAR: A 100 GOPS In-Vehicle Vision Processor Based on 128 Ring Connected Four-Way VLIW Processing Elements

Kyo, Shorin; Okazaki, Shinichiro

doi:10.1007/s11265-008-0297-0

Cited by 24 publications

(11 citation statements)

References 17 publications

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“…This work shows that to achieve ultra-low power, improving the efficiency of data movement is of crucial importance in SIMDs, which motivated us to introduce explicit datapath techniques in this work. The IMAPCAR from NEC [16] is another example of a wide SIMD processor. The IMAPCAR has 128 PEs connected with a ring network.…”

Section: Related Workmentioning

confidence: 99%

A Low-Energy Wide SIMD Architecture with Explicit Datapath

Waeijen

She

Corporaal

et al. 2014

J Sign Process Syst

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Energy efficiency has become one of the most important topics in computing. To meet the ever increasing demands of the mobile market, the next generation of processors will have to deliver a high compute performance at an extremely limited energy budget. Wide single instruction, multiple data (SIMD) architectures provide a promising solution, as they have the potential to achieve high compute performance at a low energy cost. We propose a configurable wide SIMD architecture that utilizes explicit datapath techniques to further optimize energy efficiency without sacrificing computational performance. To demonstrate the efficiency of the proposed architecture, multiple instantiations of the proposed wide SIMD architecture and its automatic bypassing counterpart, as well as a baseline RISC processor, are implemented. Extensive experimental results show that the proposed architecture is efficient and scalable in terms of area, performance, and energy. In a 128-PE SIMD processor, the proposed architecture is able to achieve an average of 206 times speed-up and reduces the total energy dissipation by 48.3% on average and up to 94%, compared to a reduced instruction set computing (RISC) processor. Compared to the corresponding SIMD architecture with automatic bypassing, an average of 64% of all register file accesses is avoided by the 128-PE, explicitly bypassed SIMD. For total energy dissipation, an average of 27.5%, and maximum of 43.0%, reduction is achieved.

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Section: Related Workmentioning

confidence: 99%

A Low-Energy Wide SIMD Architecture with Explicit Datapath

Waeijen

She

Corporaal

et al. 2014

J Sign Process Syst

View full text Add to dashboard Cite

show abstract

“…He et al addressed this problem in Xetal-Pro, by introducing extra level of memory, as well as aggressive voltage scaling, resulting in a much more efficient architecture [28,30]. The IMAP from NEC [2] is another example of wide SIMD processor. The IMAP has 128 PEs connected with a ring network.…”

Section: Related Workmentioning

confidence: 99%

“…IMAP uses a dedicated C dialect called onedimension C (1DC) to develop data-parallel processing programs [2]. Languages like 1DC can be fine tuned for the target architecture and is used by similar architectures such as Xetal.…”

Section: Related Workmentioning

confidence: 99%

A Co-Design Framework with OpenCL Support for Low-Energy Wide SIMD Processor

She

Waeijen

et al. 2014

J Sign Process Syst

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Energy efficiency is one of the most important metrics in embedded processor design. The use of wide SIMD architecture is a promising approach to build energyefficient high performance embedded processors. In this paper, we propose a design framework for a configurable wide SIMD architecture that utilizes an explicit datapath to achieve high energy efficiency. The framework is able to generate processor instances based on architecture specification files. It includes a compiler to efficiently program the proposed architecture with standard programming languages including OpenCL. This compiler can analyze the static memory access patterns in OpenCL kernels, generate efficient mappings, and schedule the code to fully utilize the explicit datapath. Extensive experimental results show that the proposed architecture is efficient and scalable in terms of area, performance, and energy. In a 128-PE SIMD processor, the proposed architecture is able to achieve up to 200 times speed-up and reduce the total energy consumption by 50 % compared to a basic RISC processor.

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“…The IMAPCAR architecture [14] from NEC combines reconfigurable architecture with SIMD processing. The architecture, however, is restrictive in that the communication between processing elements and memory banks is one-toone, which ensures scalability of the communication architecture but compilation is also restricted and simple.…”

Section: Related Workmentioning

confidence: 99%

Exploiting Both Pipelining and Data Parallelism with SIMD Reconfigurable Architecture

Kim

Lee

et al. 2012

Lecture Notes in Computer Science

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Abstract. Reconfigurable Architecture (RA), which provides extremely high energy efficiency for certain domains of applications, have one problem that current mapping algorithms for it do not scale well with the number of cores. One approach to this problem is using SIMD (Single Instruction Multiple Data) paradigm. However, SIMD can complicate the mapping problem by adding an additional dimension, i.e., iteration mapping, to the already inter-dependent problems of data mapping and operation mapping, and can significantly affect performance through memory bank conflicts. In this paper we introduce SIMD reconfigurable architecture, which allows for SIMD mapping at multiple levels of granularity, and investigate ways to minimize bank conflicts in a SIMD reconfigurable architecture with the related sub-problems taken into consideration. We further present data tiling and evaluate a conflict-free scheduling algorithm as a way to eliminate bank conflicts for a certain class of iteration and data mapping.

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IMAPCAR: A 100 GOPS In-Vehicle Vision Processor Based on 128 Ring Connected Four-Way VLIW Processing Elements

Cited by 24 publications

References 17 publications

A Low-Energy Wide SIMD Architecture with Explicit Datapath

A Low-Energy Wide SIMD Architecture with Explicit Datapath

A Co-Design Framework with OpenCL Support for Low-Energy Wide SIMD Processor

Exploiting Both Pipelining and Data Parallelism with SIMD Reconfigurable Architecture

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