In order to improve the low-frequency noise of input/output (I/O) p-metal-oxide-semiconductor fieldeffect transistors (pMOSFETs) with a 5 nm SiO 2 /2 nm HfO 2 /5 nm TiN gate stack for DRAM applications, different post-deposition treatments have been investigated. Decoupled Plasma Nitridation with various strengths is compared with an SF 6 plasma anneal. Wafers with and without an Al 2 O 3 cap, serving as a threshold voltage shifter have also been included in the study. It is shown that the best results, i.e. the lowest 1/f noise magnitude, have been found for the SF 6 -treated I/O pMOSFETs, reaching in the best case a value comparable with SiO 2 /polycrystalline silicon reference devices.