Impact of Carriers Injection Level on Transients of Discrete and Paralleled Silicon and 4H-SiC NPN BJTs

Abstract

The 4H-SiC vertical NPN BJTs are attractive power devices with potentials to be used as high power switching devices with high voltage ratings in range of 1.7 kV and high operating temperatures. In this paper, the advantages of the 4H-SiC NPN BJTs in terms of switching transients and current gain over their silicon counterparts is illustrated by means of extensive experimental measurements and modelling, including investigation of high level injection, as a common phenomenon in bipolar devices that influences the switching rates and DC current gain. The two device types have been tested at 800 V with maximum temperature of 175°C and maximum collector current of 8 A. The turn-ON and turn-OFF transition in Silicon BJT is seen to be much slower than that of the SiC BJT while the transient duration will increase with increasing temperature and decreases with larger collector currents. The common-emitter current gain of SiC BJT is also found to be much higher than silicon counterparts, increasing with temperature in low injection levels but decreasing in higher injection levels in both devices. The rate of increase of current gain slows down toward stability as the collector current increases, known as the high-level injection. Current sharing imbalance among parallel connected devices is also investigated, which are shown to be evidently dependant on temperature and base resistance in Silicon BJT, while the current collapse in also seen in SiC BJT at high injection levels with high base resistance. The turn-OFF delay is seen to be temperature dependant in single and paralleled Silicon BJTs while almost non-existent in SiC device.

Analysis of on-state static and dynamic transients of high voltage 4H-SIC Merged-PiN-Schottky diode

“…1. This effectively enables to become one of the few available bipolar SiC devices [5,6] The space between P-N junctions in the MPS structure pinches off at small reverse bias voltage where a potential barrier is formed under the p+ region to protect the Schottky contact from the high electric field. The greatly reduction of electric field at Schottky contact suppress both the Schottky barrier lowering and the surge of energy states at Schottky contact, both achieves a further reduction of leakage current in SiC MPS than Silicon MPS as the absence of surface defects in the latter devices.…”