Impact of gallium implant for advanced CMOS halo/pocket optimization

Abstract

Optimization of halo profile for advanced MOSFET device is important to control device short channel effect as well as device leakage. Multiple halo implants, such as mixture of Indium and boron to tailor the halo formation, have been used widely for n-FET devices. Amid its AMU and solubility, Gallium has a potential for better halo activation than Indium and reduced lateral straggling than boron. Therefore, Gallium could be a promising specie for device improvement through 1) halo optimization in planar devices, or 2) ground plane for retrograde well for better FinFET leakage characteristics. In this paper, Gallium is used to replace high scattering P dopant (HS-P) halo for SRAM or HS-P cluster halo for core NFET using a poly-SiON 28nm process with bare wafers and device splits. Secondary Ion Mass Spectroscopy (SIMS) was employed for dopant profiles for as-implanted and after thermal process. It is shown that when replacing HS-P or HS-P cluster halo byGallium an excessive device shift is observed. The overlap capacitance indicates that overlap lateral diffusion regions are significant different with Gallium halo than established process flow. The paper will discuss potential underlying physical mechanisms.