Optimization of halo profile for advanced MOSFET device is important to control device short channel effect as well as device leakage. Multiple halo implants, such as mixture of Indium and boron to tailor the halo formation, have been used widely for n-FET devices. Amid its AMU and solubility, Gallium has a potential for better halo activation than Indium and reduced lateral straggling than boron. Therefore, Gallium could be a promising specie for device improvement through 1) halo optimization in planar devices, or 2) ground plane for retrograde well for better FinFET leakage characteristics. In this paper, Gallium is used to replace high scattering P dopant (HS-P) halo for SRAM or HS-P cluster halo for core NFET using a poly-SiON 28nm process with bare wafers and device splits. Secondary Ion Mass Spectroscopy (SIMS) was employed for dopant profiles for as-implanted and after thermal process. It is shown that when replacing HS-P or HS-P cluster halo byGallium an excessive device shift is observed. The overlap capacitance indicates that overlap lateral diffusion regions are significant different with Gallium halo than established process flow. The paper will discuss potential underlying physical mechanisms.

An 8-channel CMOS low-noise readout IC is designed for CdZnTe (CZT) X-ray detector arrays. One channel of the IC is composed of a continuously discharged preamplifier and a comparator. The preamplifier is operated in pulse-mode and this is realized with a feedback capacitor and a pair of MOSFETs. The noise of this readout IC is calculated by the timedomain Hspice noise simulation. The operation region of this readout IC is over 10 MHz, so the thermal noise of the input transistor dominates over the detector shot noise and the 1/f noise of the input transistor. The calculated RMS total noise voltage at the output node of the preamplifier is 0.246 mV. The prototype chip is fabricated in 1.5 µ µ µ µm CMOS technology through MOSIS and the measured noise voltage of the preamplifier output is 0.435 mV. The results suggest that the time-domain Hspice noise simulation can be used to design the low noise readout IC. 0-7803-7636-6/03/$17.00 ©2003 IEEE. 0-7803-7636-6/03/$17.00 ©2003 IEEE.