Impact of Ionizing Radiation on the $\hbox{SiO}_{2}/ \hbox{SiC}$ Interface in 4H-SiC BJTs

Usman, Muhammad; Hallén, Anders

doi:10.1109/ted.2012.2222414

Cited by 10 publications

(4 citation statements)

References 21 publications

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“…It has been observed previously that the deposition of Al 2 O 3 by using ALD results in huge shift in flatband voltage (V BE ) and, normally, a post deposition treatment is required to reduce this shift. 17,18 However, here in the stacked dielectrics, consisting of HfO 2 and Al 2 O 3 , it is observed that RTA has considerably increased the total amount of fixed charges in the oxide. The fixed charge in the oxide, observed in CV measurements, has a contribution from the distribution of charges in the whole oxide layer, as well as from the interface between HfO 2 /Al 2 O 3 and the interface between Al 2 O 3 /SiC.…”

Section: Resultsmentioning

confidence: 85%

HfO₂/Al₂O₃Bilayered High-kDielectric for Passivation and Gate Insulator in 4H-SiC Devices

Usman

Henkel

Hallén

2013

ECS J. Solid State Sci. Technol.

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The electrical and chemical properties of high-k dielectric stacks consisting of Hafnium oxide (HfO 2 ) and Aluminum oxide (Al 2 O 3 ) deposited on 4H-SiC have been investigated by preparing metal insulator semiconductor (MIS) structures of HfO 2 /Al 2 O 3 /SiC. The bilayer gate stack was deposited by using atomic layer deposition (ALD). The samples were also treated by rapid thermal annealing (RTA) at 970 • C for 5 mins in an inert gas atmosphere. Structural properties of the deposited films were analyzed with X-ray diffraction (XRD), atomic force microscopy (AFM) and Rutherford backscattering spectroscopy (RBS). Capacitance-voltage (CV) measurements performed on as-deposited and RTA treated structures at room temperature show that the RTA treatment increases the effective oxide charges in the whole dielectric but decreases the interface trap density. Current-voltage (IV) measurements have been performed in order to extract the leakage current density as well as the breakdown characteristics of the stack. Our results show that a combination of HfO 2 and Al 2 O 3 can be a better choice for SiC than individual Al 2 O 3 layer because of the higher value of effective dielectric constant. It is shown that the stacked dielectrics are stable at high temperatures and under annealing conditions up to 300 • C, which makes the layers compatible with SiC device processing and higher operating temperatures compared to silicon.

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Section: Resultsmentioning

confidence: 85%

HfO₂/Al₂O₃Bilayered High-kDielectric for Passivation and Gate Insulator in 4H-SiC Devices

Usman

Henkel

Hallén

2013

ECS J. Solid State Sci. Technol.

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“…doping of p-shield 5×10 18 The key device parameters of the following investigations are shown in Table 1, and these devices' drift parameters are designed for 15-kV voltage level according to Sung et al [16] The thickness of sidewall and bottom of gate oxide is 50 nm and 100 nm, respectively. The mobility of MOSchannel is set to be 30 cm 2 /V•s.…”

Section: Device Mechanism and Descriptionmentioning

confidence: 99%

A 4H-SiC trench IGBT with controllable hole-extracting path for low loss

Wu¹,

Liu²,

Song³

et al. 2023

Chinese Phys. B

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A novel 4H-SiC trench IGBT with a controllable hole-extracting (CHE) path is proposed and investigated in this paper. The CHE path is controlled by metal semiconductor gate (MES gate) and metal oxide semiconductor gate (MOS gate) in p-shield region. The grounded p-shield region can significantly suppress the high electric field around gate oxide in SiC devices, but it weakens the conductivity modulation in the SiC trench IGBT by rapidly sweeping out holes. This effect can be eliminated by introducing CHE path. The CHE path is pinched off by the high gate bias voltage in on-state to maintain high conductivity modulation and obtain a comparatively low on-state voltage (V ON). During the turn-off transient, the CHE path is formed, which contributes to a decreased turn-off loss (E OFF). Based on numerical simulation, the E OFF of the proposed IGBT is reduced by 89% compared with the conventional IGBT at same V ON and the V ON of the proposed IGBT is reduced by 50% compared to the grounded p-shield IGBT at same E OFF. In addition, the average power reduction for the proposed device can be 51.0 % to 81.7 % and 58.2% to 72.1% with its counterparts at a wide frequency range of 500 Hz to 10 kHz, revealing a great improvement of frequency characteristics.

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“…where L a is the am-bipolar diffusion length. Because the doping concentration of the N-drift region can affect carrier mobility 2) and carrier lifetime, [26][27][28] L a is dependent on the doping concentration of the N-drift region. The hole-carrier concentration at P + collector=N-buffer ( p 0 ) 23) and P + shield-ing=N-drift ( p WB ) can be written as…”

Section: Hole-carrier Concentration Profilementioning

confidence: 99%

Investigation of analytical model of turn-off loss for 4H-SiC high-voltage trench insulated gate bipolar transistors

Liu

Wang

Fang

2018

Jpn. J. Appl. Phys.

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In this paper, an analytical model of 4H-SiC high-voltage trench insulated gate bipolar transistors (IGBTs) turn-off loss is developed for a given operating condition and validated with a two-dimensional numerical simulation without experimental conditions. Moreover, the hole-carrier concentration profile is also modeled. The simulation results demonstrated that the analytical model is correct within an acceptable range. It has been verified that the analytical model matches well with simulation results with increasing carrier lifetime in the N-drift region.

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Impact of Ionizing Radiation on the $\hbox{SiO}_{2}/ \hbox{SiC}$ Interface in 4H-SiC BJTs

Cited by 10 publications

References 21 publications

HfO₂/Al₂O₃Bilayered High-kDielectric for Passivation and Gate Insulator in 4H-SiC Devices

HfO₂/Al₂O₃Bilayered High-kDielectric for Passivation and Gate Insulator in 4H-SiC Devices

A 4H-SiC trench IGBT with controllable hole-extracting path for low loss

Investigation of analytical model of turn-off loss for 4H-SiC high-voltage trench insulated gate bipolar transistors

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Impact of Ionizing Radiation on the $\hbox{SiO}_{2}/ \hbox{SiC}$ Interface in 4H-SiC BJTs

Cited by 10 publications

References 21 publications

HfO2/Al2O3Bilayered High-kDielectric for Passivation and Gate Insulator in 4H-SiC Devices

HfO2/Al2O3Bilayered High-kDielectric for Passivation and Gate Insulator in 4H-SiC Devices

A 4H-SiC trench IGBT with controllable hole-extracting path for low loss

Investigation of analytical model of turn-off loss for 4H-SiC high-voltage trench insulated gate bipolar transistors

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HfO₂/Al₂O₃Bilayered High-kDielectric for Passivation and Gate Insulator in 4H-SiC Devices

HfO₂/Al₂O₃Bilayered High-kDielectric for Passivation and Gate Insulator in 4H-SiC Devices