Impact of nitrogen (N/sub 14/) implantation into polysilicon gate on high-performance dual-gate CMOS transistors

Yu, Bin; Ju, Dong-Hyuk; Kepler, N.; Hu, Chenming

doi:10.1109/55.596922

Cited by 21 publications

(2 citation statements)

References 9 publications

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“…A variety of techniques can be used to form dual gate devices, although each entail added process complexity or degradation in oxide integrity [5][6][7]. The process we use is shown in Table I.…”

Section: Methodsmentioning

confidence: 99%

Zero Defectivity Dual Gate Processing

Towner¹,

Naughton²,

Lappan³

2007

ECS Trans.

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A mixed-signal automotive device manufactured in a dual gate process historically had sporadic yields. Problems were associated with analog failures, including the temperature sense circuit, load dump trip levels, comparators and the 8MHz oscillator. These issues related to p-mos devices with common mode inputs <1.5V. The only anomaly observed at electrical test was in the threshold voltage matching of a particular size of transistor pairs. When 100% testing of these scribe line monitors was performed there were many random failures, with higher probability around the perimeter of the wafer. The magnitude of the offset was consistent with a 2nm difference in gate oxide thickness. Darkfield inspection following etchback of oxide from standard gate regions showed water spotting and damage to active areas. No defects were observed following the introduction of a 10sec oxygen plasma treatment prior to oxide etchback. This change coincided with improved yields and the elimination of the analog failures.

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Section: Methodsmentioning

confidence: 99%

Zero Defectivity Dual Gate Processing

Towner¹,

Naughton²,

Lappan³

2007

ECS Trans.

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“…3,4 Nitrided gate oxides have been studied extensively because of their ability to block boron penetration in thin gate dielectrics, 5,6 as well as their superior reliability properties over conventional pure oxide types. 7,8 In order to form the nitrided oxide film, a number of process techniques such as rapid thermal oxidation (RTO) in a N 2 O or NO ambient, 9 nitridation of pure oxide in a nitrogen-contained ambient, 10,11 remote plasma nitridation, 12 nitrogen implantation into the Si-substrate before gate oxidation, 13 and nitrogen implantation into gate polysilicon [14][15][16] have been introduced. On the other hand, heavy pileup of nitrogen atom at the gate oxide/Si substrate interface leads to some inferior asgrown characteristics such as transconductance degradation, threshold voltage shift, and mobility degradation in the inversion layer.…”

mentioning

confidence: 99%

Impact of Nitrogen Implantation into Polysilicon Followed by Drive‐in Process on Gate Oxide Integrity

Cho¹,

Ko²,

Nga³

et al. 1999

J. Electrochem. Soc.

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A nitridation technique involving shallow implantation of nitrogen into the polysilicon gate followed by thermal drive-in process was studied. Successful incorporation of nitrogen into the gate oxide/polysilicon interface has been achieved, and thereby the reliability of gate oxide has been improved due to the reduced boron diffusion into the gate oxide in p ϩ polysilicon gate metal oxide semiconductor devices. An amount of nitrogen segregated in the oxide was found to be independent of the nitrogen implantation dose but to depend only on the drive-in thermal budget. Therefore, a high thermal budget in the drive-in process with a low nitrogen implantation dose is a promising direction for this process to have a high nitrogen concentration in the oxide and a low nitrogen concentration in the polysilicon to avoid a serious poly-depletion problem. However, it also has been found that when the amount of nitrogen incorporation in the oxide exceeds a certain limit, gate oxide reliability is degraded due to enhanced electron trapping. ) unless CC License in place (see abstract). ecsdl.org/site/terms_use address. Redistribution subject to ECS terms of use (see 128.255.-148.31 Downloaded on 2015-05-23 to IP

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Effect of thermal annealing and nitrogen content on amorphous silicon thin‐film crystallization

Bouridah

Mansour

Mahamdi

et al. 2007

Physica Status Solidi (a)

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We study the influence of high‐temperature annealing (1100–1200 °C) on the crystallization of nitrogen‐doped silicon films deposited by LPCVD (low‐pressure chemical vapor deposition) at low temperature (465 °C) from disilane Si2H6 and ammonia NH3. Scanning electron microscopy (SEM) and X‐ray diffraction, studies of films are used to analyze crystallinity evolution and grain orientations. Results show the transformation of films deposited in amorphous phase to a typically polycrystalline structure after high‐temperature annealing with a large grain size exceeding 1 μm. The structural properties are strongly influenced by the annealing conditions and the nitrogen ratio in each film. It is shown that the film crystallinity increases with the duration of annealing, and that the nitrogen content inhibits the crystallization phenomena. (© 2007 WILEY‐VCH Verlag GmbH & Co. KGaA, Weinheim)

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Impact of nitrogen (N/sub 14/) implantation into polysilicon gate on high-performance dual-gate CMOS transistors

Cited by 21 publications

References 9 publications

Zero Defectivity Dual Gate Processing

Zero Defectivity Dual Gate Processing

Impact of Nitrogen Implantation into Polysilicon Followed by Drive‐in Process on Gate Oxide Integrity

Effect of thermal annealing and nitrogen content on amorphous silicon thin‐film crystallization

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