Impact of operating temperature on the electrical and magnetic properties of the bottom-pinned perpendicular magnetic tunnel junctions

Abstract

Analogous device parameters in both the parallel (P) and anti-parallel (AP) states ensure a symmetric spin-transfer-torque magnetic random-access memory operation scheme. In this study, however, we observe an increasing asymmetry in the performance metrics with operating temperature of the bottom-pinned perpendicular magnetic tunnel junction (p-MTJ) devices. A temperature-dependent increase in the contribution of the stray field is observed in the tunneling magnetoresistance loop analysis. The switching current for P-to-AP decreases by 30% in the thermally activated switching regime by increasing the temperature from 300 K to 400 K, while it remains similar for AP-to-P. In addition, with the same temperature range, the thermal stability factor for the P state decreases 20% more than that for the AP state. We attribute those observations to the increase in the overcompensation of the stray field from the synthetic anti-ferromagnet structure. Saturation magnetization (MS) of the [Co/Pt]x-based multilayers is much less affected by temperature [MS(400 K)/MS(300 K) = 97%] compared to that of the CoFeB-based multilayers (88%). Such an impact can be more severe during the electrical switching process due to the Joule heating effect. These results suggest that, to understand and to evaluate the performance in a wide range of temperatures, it is crucial to consider the contribution of the entire magnetic components in the p-MTJ stack.

Testing STT-MRAM: Manufacturing Defects, Fault Models, and Test Solutions

“…The magnetization (m PL ) of the PL is strongly pinned to a certain direction by an inner synthetic anti-ferromagnet (iSAF) [76]. With the fixed magnetization in PL as a reference, the magnetization in FL is either parallel (P state) or anti-parallel (AP state) to that of PL, as illustrated with the left and right device schematics, respectively, in Figure 3 Note that the real-world MTJ stack designs are much more complicated; the MTJ stack may consist of more than 10 thin films to enhance the device performance, as can be found in [76,[78][79][80]. For example, it is found that adding an MgO capping layer, the white line above the FL in Figure 3.1b is very effective in enhancing the thermal stability [78].…”

“…For example, it is found that adding an MgO capping layer, the white line above the FL in Figure 3.1b is very effective in enhancing the thermal stability [78]. Furthermore, the PL consists of a reference layer (RL), composed of Co/Ru/CoFeB, and a hard layer (HL), composed of [Co/Pt] x ; The RL and HL are anti-ferromagnetically coupled [80].…”

“…Since H offset is essentially equivalent to the extra external field applied to cancel out H s_intra , the relation of these two parameters is H s_intra = −H offset . Given the fact that the resistance-area product (RA) does not change with the device size, the electrical Critical Diameter (eCD) of each device can be derived by [80]:…”

Impact of Magnetic Coupling and Density on STT-MRAM Performance

“…Since H offset is essentially equivalent to the extra external field applied to cancel out H s intra , the relation of these two parameters is H s intra = −H offset . Given the fact that the resistance-area product (RA) does not change with the device size, the electrical Critical Diameter (eCD) of each device can be derived by [18]:…”

“…Since H offset is essentially equivalent to the extra external field applied to cancel out H s intra , the relation of these two parameters is H s intra = −H offset . Given the fact that the resistance-area product (RA) does not change with the device size, the electrical Critical Diameter (eCD) of each device can be derived by [18]: eCD = 4 π • RA RP , where RA=4.5 Ω • µm 2 (measured at blanket stage) for this wafer, and R P can be extracted from the R-H loop (i.e., the lower horizontal line in Fig. 2a).…”