2016 9th International Conference on Electrical and Computer Engineering (ICECE) 2016
DOI: 10.1109/icece.2016.7853871
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Impact of scaling channel length on the performances of nanoscale FETs

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Cited by 7 publications
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“…Figure 1 displays the schematic of DG MOSFET. The key challenge of short channel effect in nanoscale single gate devices can be solved by multi-gate architectures such as double gate, tri-gate and gate all around the structure [15]. The DG MOSFET configuration minimizes short-channel effects, allowing devices up to 10 nm gate length to be downscaled more aggressively [16].…”
Section: Double Gate (Dg) Mosfetmentioning
confidence: 99%
“…Figure 1 displays the schematic of DG MOSFET. The key challenge of short channel effect in nanoscale single gate devices can be solved by multi-gate architectures such as double gate, tri-gate and gate all around the structure [15]. The DG MOSFET configuration minimizes short-channel effects, allowing devices up to 10 nm gate length to be downscaled more aggressively [16].…”
Section: Double Gate (Dg) Mosfetmentioning
confidence: 99%