Impact of Security Measures on Performance Aspects in SysML Models

Zoor, Maysam; Apvrille, Ludovic; Pacalet, Renaud

doi:10.5220/0008970203730380

Cited by 2 publications

(11 citation statements)

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“…Thirty‐one studies 38–68 were focusing on both requirements modeling and analysis. A few studies were either focusing solely on requirements analysis 69–72 or requirements traceability 73 …”

Section: Mapping Study Resultsmentioning

confidence: 99%

Model‐driven engineering of safety and security software systems: A systematic mapping study and future research directions

Mashkoor

Egyed

Wille

et al. 2022

J Software Evolu Process

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This article presents a systematic mapping study on the model-driven engineering of safety and security concerns in software systems. Combined modeling and development of both safety and security concerns is an emerging field of research as both concerns affect one another in unique ways. Our mapping study provides an overview of the current state of the art in this field. This study carefully selected 143 publications out of 27,259 relevant papers through a rigorous and systematic process. This study then proposes and answers questions such as frequently used methods and tools and development stages where these concerns are typically investigated in application domains. Additionally, we identify the community's preference for publication venues and trends. The discussion on obtained results also features the gained insights and future research directions.

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Section: Mapping Study Resultsmentioning

confidence: 99%

Model‐driven engineering of safety and security software systems: A systematic mapping study and future research directions

Mashkoor

Egyed

Wille

et al. 2022

J Software Evolu Process

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“…While in some simple cases having the min/max latency can be beneficial for the designer, in other complex cases, especially when new safety and security measures are added to the model, having only the min/max delay between operators doesn't help much the designer on the precise cause of the latencies or on how to enhance the model to further improve performance. For this, the performance evaluation technique of TTool has been updated in [34]. The enhanced performance analysis technique analyzes the simulation traces of a SysML mapping model to show which elements of the platform contributed to the latency value.…”

Section: Performance Evaluationmentioning

confidence: 99%

“…The Detailed Latency Analysis Technique ( Figure 2) already implemented in TTool [34] helps the designer to investigate the model performance and the cause of delay between two operators θ A and θ B . However, it is based on the assumption that the two operators have a one-to-one relation.…”

Section: Latency Analysis Using Graph Taintingmentioning

confidence: 99%

“…In other words, it assumes that the i th occurrence of the second operator θ B corresponds to the i t h occurrence of the first operator θ A . While this assumption holds for some use cases as shown in [34], removing this assumption opens new avenues. To overcome the one-to-one limitation, a new analysis technique is defined in this section.…”

Section: Latency Analysis Using Graph Taintingmentioning

confidence: 99%

“…STA_GT requires as input: the simulation trace, the generated latency graph of the model, and the 2 operators θ A and θ B . The latency graph д corresponding to the model is generated based on the algorithm presented in [34]. In this use case, the latency graph is composed of 244 vertices and 393 edges.…”

Section: System Verificationmentioning

confidence: 99%

See 2 more Smart Citations

SysML models

Zoor

Apvrille

Pacalet

2020

Proceedings of the 23rd ACM/IEEE International Conference on Model Driven Engineering Languages and Systems: Companion Proceedi

Self Cite

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Designing safe, secure and efficient embedded systems implies understanding interdependencies between safety, security and performance requirements and mechanisms. In this paper, we introduce a new technique for analyzing the performance impact of safety/security implemented as hardware and software mechanisms and described in SysML models. Our analysis approach extracts a dependency graph from a SysML model. The SysML model is then simulated to obtain a list of simulation transactions. Then, to study the latency between two events of interest, we progressively taint the dependency graph according to simulation transactions and to dependencies between all software and hardware components. The simulation transactions are finally classified according to which vertex taint they correspond, and are displayed according to their timing and related hardware device. Thus a designer can easily spot which components need to be re-modeled in order to meet the performance requirement. A Rail Carriage use case studied in the scope of the H2020 AQUAS project illustrates our approach, in particular how tainting can handle the multiple occurrences of the same event. CCS CONCEPTS • Computer systems organization → Embedded software.

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Impact of Security Measures on Performance Aspects in SysML Models

Cited by 2 publications

References 0 publications

Model‐driven engineering of safety and security software systems: A systematic mapping study and future research directions

Model‐driven engineering of safety and security software systems: A systematic mapping study and future research directions

SysML models

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