Impact of surface chemical treatment on capacitance-voltage characteristics of GaAs metal-oxide-semiconductor capacitors with Al2O3 gate dielectric

Abstract

The authors examine the impact of two different chemical surface treatment methods on capacitance-voltage characteristics of GaAs metal-oxide-semiconductor (MOS) capacitors using NH4OH and (NH4)2S prior to atomic layer deposition (ALD) of Al2O3. In both cases, x-ray photoelectron spectroscopy data confirm the removal of As2O3∕As2O6 upon Al2O3 deposition. However, Ga–O bonds appear to incorporate in the final gate stack at the Al2O3∕GaAs interface. MOS capacitors exhibit a steep transition from accumulation to depletion as well as very low leakage current density indicating high quality of ALD-Al2O3. The midgap interface trap density was evaluated to be (∼3–5)×1011∕cm2eV using the Terman method. In addition, quasistatic capacitance-voltage (C-V) measurement confirms the formation of true inversion layer in GaAs using both chemical treatment protocols. However, sulfur-passivated GaAs demonstrates better frequency dispersion behavior and slightly smaller capacitance equivalent thickness than hydroxylated GaAs. A statistical study substantiates the reproducibility of these results.

Self-aligned inversion-type enhancement-mode GaAs metal-oxide-semiconductor field-effect transistor with Al2O3 gate dielectric

“…7-11͒ and atomic layer deposition ͑ALD͒ of Al 2 O 3 . [12][13][14][15] It is known that ALD offers a precise control over the uniformity and thickness of the deposited film through a self-limiting reaction. 16 Although MOS capacitors have been extensively utilized to study physical and electrical characteristics of high-/III-V interface, there have been only few demonstrations of inversion-type e-mode GaAs and In 1−x Ga x As nMOSFETs.…”

High-quality III–V semiconductor MBE growth on Ge/Si virtual substrates for metal-oxide-semiconductor device fabrication

“…Several methods have also been proposed to improve the interface quality between gate dielectric layers and III-V materials, such as wet chemical etching of native oxides [16], and sulfur passivation [17]. In our previous work, we demonstrated that an arsenic cap layer efficiently protects the surface of III-V materials from oxidation and contamination during wafer transfer and reduced interface defect density [18].…”

A review of InP/InAlAs/InGaAs based transistors for high frequency applications

“…The various interface treatment techniques reported in the past years such as sulfur (S) compounds [62], nitrogen plasma [60], hydrogen bromide solution [63], PH 3 passivation [64], and fluorine treatment [65,66] have very much improved the device characteristics. On the other hand, buried channel III-V MOSFETs [67][68][69] with InAlAs barrier layer and Si interfacial passivation layer [70,71], or with single InP barrier layer or InP/InAlAs double barrier layer using ex-situ ALD oxide [72,73], or flat band InGaAs MOSFETs with GaAs/AlGaAs barrier layer and Si d-doping using in-situ MBE GaGdO x gate oxide [74][75][76][77][78][79], or Metal oxide semiconductor-high-electron mobility transistors (MOS-HEMTs) [76] have been demonstrated much higher channel mobility [70][71][72][73][74][75][76] compared to surface channel MOSFETs [39][40][41][42][43][44][45][46][47][48][49][50][51][52][53][54][55].…”