Impact of technology scaling on CMOS RF devices and circuits

Abou-Allam, E.; Manku, T.; Ma, Tao; Obrecht, M.S.

doi:10.1109/cicc.2000.852685

Cited by 26 publications

(10 citation statements)

References 5 publications

Supporting

Mentioning

Contrasting

Unclassified

Order By: Relevance

“…The core of the oscillator benefits from HBT transistors which have the high f T and f max , lower 1/f noise [21], reduced broadband shot noise, and thermal noise when compared with that of FETs [22] and higher transconductance for a given bias [23]. The HBTs also operate better at lower dc current values providing lower phase noise at lower power dissipation.…”

Section: B Vco Corementioning

confidence: 99%

Realization of a VCO for WLAN applications using 0.35 μm-siGe BICMOS technology

Esame

Tekin

Gürbüz

2008

Int J RF and Microwave Comp Aid Eng

View full text Add to dashboard Cite

Section: B Vco Corementioning

confidence: 99%

Realization of a VCO for WLAN applications using 0.35 μm-siGe BICMOS technology

Esame

Tekin

Gürbüz

2008

Int J RF and Microwave Comp Aid Eng

View full text Add to dashboard Cite

“…The core of the oscillator benefits from HBT transistors which have the high f T and f max , lower 1/f noise [21], reduced broadband shot noise and thermal noise compared to that of FETs [22] and higher transconductance for a given bias [23]. The HBTs also operate better at lower DC current values providing lower phase noise at lower power dissipation.…”

Section: B Vco Corementioning

confidence: 99%

Design of a 4.2–5.4 GHz differential LC VCO using 0.35 μm SiGe BiCMOS technology for IEEE 802.11a applications

Esame

Tekin

Bozkurt

et al. 2007

Int J RF and Microwave Comp Aid Eng

View full text Add to dashboard Cite

In this paper, a 4.2-5.4 GHz, ÀGm LC voltage controlled oscillator (VCO) for IEEE 802.11a standard is presented. The circuit is designed with AMS 0.35 lm SiGe BiCMOS process that includes high-speed SiGe Heterojunction Bipolar Transistors (HBTs). According to post-layout simulation results, phase noise is À110.7 dBc/Hz at 1 MHz offset from 5.4 GHz carrier frequency and À113.4 dBc/Hz from 4.2 GHz carrier frequency. A linear, 1200 MHz tuning range is obtained from the simulations, utilizing accumulation-mode varactors. Phase noise was also found to be relatively low because of taking advantage of differential tuning concept. Output power of the fundamental frequency changes between 4.8 dBm and 5.5 dBm depending on the tuning voltage. Based on the simulation results, the circuit draws 2 mA without buffers and 14.5 mA from 2.5 V supply including buffer circuits leading to a total power dissipation of 36.25 mW. The circuit layout occupies an area of 0.6 mm 2 on Si substrate, including DC and RF pads.

show abstract

“…For a typical n-well CMOS process, the unity gain frequency f t of NMOS devices is approximately twice that of PMOS devices, due to electrons have a higher saturation velocity compared to holes (Abou-Allam et al 2000). In addition, to realize the same transconductance with transistors of the same gate length, a PMOS gate length must be 3 times wider than a NMOS.…”

Section: Introductionmentioning

confidence: 99%

Low-voltage NMOS-based current differencing buffered amplifier and its application to current-mode ladder filter design

Tangsrirat¹,

Klahan²,

Dumawipata³

et al. 2006

International Journal of Electronics

View full text Add to dashboard Cite

An integratable circuit technique to realize a low-voltage current differencing buffered amplifier (CDBA) is introduced. The realization scheme is through the modification of a low-input resistance CCIIþ and the proposed CDBA can operate with the minimum supply voltage of AE1.25 V. In order that the signal path consists of only NMOS transistors, a negative current mirror using NMOS transistors is employed. With standard 0.5 mm CMOS process parameters, PSPICE simulation results show that the proposed CDBA provides the terminal resistance of r n ffi r p ffi r w ffi 13 , r z ffi 290 k, and the À3 dB bandwidth of about 500 MHz. Application examples employing the proposed CDBA as active elements in the leapfrog simulation of current-mode ladder filters are also included.

show abstract

Impact of technology scaling on CMOS RF devices and circuits

Cited by 26 publications

References 5 publications

Realization of a VCO for WLAN applications using 0.35 μm-siGe BICMOS technology

Realization of a VCO for WLAN applications using 0.35 μm-siGe BICMOS technology

Design of a 4.2–5.4 GHz differential LC VCO using 0.35 μm SiGe BiCMOS technology for IEEE 802.11a applications

Low-voltage NMOS-based current differencing buffered amplifier and its application to current-mode ladder filter design

Contact Info

Product

Resources

About