Implementation of a Reconfigurable Architecture to Compute Linear Transformations Used in Signal/Image Processing

Sanyal, Atri; Sinha, Amitabha

doi:10.1007/978-981-33-4367-2_49

Advances in Intelligent Systems and Computing

2021

DOI: 10.1007/978-981-33-4367-2_49

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Implementation of a Reconfigurable Architecture to Compute Linear Transformations Used in Signal/Image Processing

Atri Sanyal

Amitabha Sinha²

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2022

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Sanyal

Sinha

2022

International Journal of Software Innovation

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A reconfigurable transform processor is proposed and implemented here. Firstly, a brief study of processors implementing different transformations is presented. We have categorized the transform processor as the one which can implement a number of linear transforms using reconfigurability. The theoretical suitability regarding the architecture of the processor is proved by graph theory method. Then the complete architecture of the overall processor and the processing element is presented and implemented using VHDL. The complete instruction set suitable to the processor is designed. The instructions are mapped to the sequence of control signals. Generating sequence of control signals for every type of instructions would finally create a hardwired control unit for the processor which was also presented. Next the processor is fed with data to simulate it. A three-phase simulation is carried out to prove the correctness of the design. Finally the same processor with a data bus width of 32 to 512 is implemented and compared in terms of speed and size.

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Sanyal

Sinha

2022

International Journal of Software Innovation

Self Cite

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Implementation of a Reconfigurable Architecture to Compute Linear Transformations Used in Signal/Image Processing

Cited by 1 publication

References 11 publications

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