2017
DOI: 10.7763/ijcte.2017.v9.1188
|View full text |Cite
|
Sign up to set email alerts
|

Implementation of an Asynchronous Micro-controlleron the Commercial FPGA

Abstract: Abstract-An asynchronous circuit design methodology has been introduced as a novelty approach to future digital system design. Nevertheless, in order to implement the asynchronous circuit, there are various limitations. Especially, for the implementation on a commercialized field programmable gate array (FPGA), the vendors and design tools mainly support only synchronous circuit design. In this paper, we propose design techniques for implementing the asynchronous circuit on the commercial FPGA using the provid… Show more

Help me understand this report

Search citation statements

Order By: Relevance

Paper Sections

Select...
1
1

Citation Types

0
2
0

Year Published

2021
2021
2022
2022

Publication Types

Select...
1
1

Relationship

1
1

Authors

Journals

citations
Cited by 2 publications
(2 citation statements)
references
References 17 publications
0
2
0
Order By: Relevance
“…Further, in the case of the bounded delay model, it requires a worst-case analysis for each data path to match the Req signal. Therefore, design-specific delay cells were also implemented by creating an LUT-based gate chain [19].…”
Section: A Lut-based Design For the Asynchronous Controllermentioning
confidence: 99%
“…Further, in the case of the bounded delay model, it requires a worst-case analysis for each data path to match the Req signal. Therefore, design-specific delay cells were also implemented by creating an LUT-based gate chain [19].…”
Section: A Lut-based Design For the Asynchronous Controllermentioning
confidence: 99%
“…3(b). However, SIC protocol is apparently used in asynchronous systems built on FPGAs [17], [18], [19].…”
Section: Problems With Initial Decompositionmentioning
confidence: 99%