Implementation of an Automatic Modulation Recognition System on a Software Defined Radio Platform

Azza, Mohammed Amine; Moussati, Ali El; Moussaoui, Omar

doi:10.1109/isaect.2018.8618837

Cited by 7 publications

(3 citation statements)

References 7 publications

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“…In this work the authors use a modified CNN known as a residual neural network and achieve an overall 96% accuracy, this performance is maintained until 10 dB SNR, although the authors do demonstrate that low order modulation classification accuracy reaches 100% accuracy. It is worth noting that the trend of lower order modulation scheme classification achieving higher classification accuracy is consistent across many papers [19,23,25,26]. ResNet and ModNet are therefore the best performing examples of waveform and constellation classification in hardware respectively,…”

Section: Hardware Comparisonssupporting

confidence: 70%

“…Papers [20] and [26] use the largest number of modulation schemes for testing, consisting of a set of 24 different schemes including high order modulations of 256, 128, and 64QAM, utilizing these high order schemes in testing will naturally introduce a penalty to the average system classification accuracy due to the previously mentioned overlap in denser constellation diagrams, in this case 5 out of 24 total modulation schemes used in these papers are of order 64 and above. Conversely, [19,24] use a maximum of 16QAM , [16,23] use a maximum of 64QAM . Due to this, these works are expected to have a higher average accuracy due to the higher order datasets used.…”

Section: Accuracy Comparisonmentioning

confidence: 99%

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Low Area and Low Power FPGA Implementation of a DBSCAN-Based RF Modulation Classifier

Gavin,

Deng,

Ball

2024

IEEE Open J. Comput. Soc.

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This paper presents a new low-area and low-power Field Programmable Gate Array (FPGA) implementation of a Radio Frequency (RF) modulation classifier based on the Density-Based Spatial Clustering of Applications with Noise (DBSCAN) algorithm, known as DBCLASS. The proposed architecture demonstrates a novel approach for the efficient hardware realisation of the DBSCAN algorithm by utilising parallelism, a bespoke sorting algorithm, and eliminating memory access. The design achieves 100% classification accuracy with labcaptured RF data above 8 dB signal-to-noise ratio(SNR) whilst exhibiting an improvement of latency in comparison to the next quickest design by a factor of 7.5, a reduction in terms of total FPGA resources used in comparison to the next smallest complete system by a factor of 3.65, and a reduction in power consumption over the next most efficient by a factor of 4.75. The proposed design is well suited for resource-constrained applications, such as mobile cognitive radios and spectrum monitoring systems.

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Section: Hardware Comparisonssupporting

confidence: 70%

Section: Accuracy Comparisonmentioning

confidence: 99%

Low Area and Low Power FPGA Implementation of a DBSCAN-Based RF Modulation Classifier

Gavin,

Deng,

Ball

2024

IEEE Open J. Comput. Soc.

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“…From the results obtained, our method outperforms all these modulation schemes. Keshk et al [26] Table 2 compares the proposed method with [32] for BPSK, QPSK, and 16QAM modulation schemes. Accuracy of classifiers based on Moment, Cumulant, GP-KNN, and EM-ML changes with carrier phase offset as given in [33] while the developed algorithm is independent to such phase offsets.…”

Section: Comparison With Other Classifiersmentioning

confidence: 99%