Implementation of an SDR system using an MPI-based GPU cluster for WiMAX and LTE

Ahn, Chiyoung; Bang, Saehee; Kim, Hyo-Han; Lee, Seunghak; Kim, June; Choi, Sangdun; Glossner, John

doi:10.1007/s10470-012-9941-5

Cited by 11 publications

(9 citation statements)

References 12 publications

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“…In this subsection, we have summarized the LTE data throughput obtained from both the reconfigurable MD and legacy MD in a signal environment where the QoS and availability of the LSA band vary as a function of time. For the experimental tests introduced in this subsection, the MD prototype shown in Section 4 was used for the reconfigurable MD, while the dual mode eNB supporting FDD and TDD LTE shown in our previous work in [22] was used. Figure 6 illustrates a functional block diagram of the dual mode eNB [22] that supports both FDD and TDD LTE and that of MD.…”

Section: Methodsmentioning

confidence: 99%

“…For the experimental tests introduced in this subsection, the MD prototype shown in Section 4 was used for the reconfigurable MD, while the dual mode eNB supporting FDD and TDD LTE shown in our previous work in [22] was used. Figure 6 illustrates a functional block diagram of the dual mode eNB [22] that supports both FDD and TDD LTE and that of MD. Both eNB and MD were implemented with a PC including a GPU for base band signal processing and USRP N210, which plays the role of the RF transceiver.…”

Section: Methodsmentioning

confidence: 99%

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ETSI-Standard Reconfigurable Mobile Device for Supporting the Licensed Shared Access

Kim¹,

Jin²,

Kum³

et al. 2016

Mobile Information Systems

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In order for a Mobile Device (MD) to support the Licensed Shared Access (LSA), the MD should be reconfigurable, meaning that the configuration of a MD must be adaptively changed in accordance with the communication standard adopted in a given LSA system. Based on the standard architecture for reconfigurable MD defined in Working Group (WG) 2 of the Technical Committee (TC) Reconfigurable Radio System (RRS) of the European Telecommunications Standards Institute (ETSI), this paper presents a procedure to transfer control signals among the software entities of a reconfigurable MD required for implementing the LSA. This paper also presents an implementation of a reconfigurable MD prototype that realizes the proposed procedure. The modem and Radio Frequency (RF) part of the prototype MD are implemented with the NVIDIA GeForce GTX Titan Graphic Processing Unit (GPU) and the Universal Software Radio Peripheral (USRP) N210, respectively. With a preset scenario that consists of five time slots from different signal environments, we demonstrate superb performance of the reconfigurable MD in comparison to the conventional nonreconfigurable MD in terms of the data receiving rate available in the LSA band at 2.3–2.4 GHz.

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Section: Methodsmentioning

confidence: 99%

Section: Methodsmentioning

confidence: 99%

ETSI-Standard Reconfigurable Mobile Device for Supporting the Licensed Shared Access

Kim¹,

Jin²,

Kum³

et al. 2016

Mobile Information Systems

Self Cite

View full text Add to dashboard Cite

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“…The price that has to be paid is the increased complexity of hardware components and algorithms. Moreover, several GP-GPU-based communication systems have been proposed in [18,19].In order to exploit the parallelism of the MPA platforms, we have to overcome the main disadvantage of the SD algorithm, namely, its sequential nature. The main drawback of the SD algorithm is in its sequential nature, consequently, running it on massively parallel architectures (MPAs) is very inefficient.…”

mentioning

confidence: 99%

“…Recent research proved that computationally heavy signal processing algorithms like detection [7,[12][13][14], decoding [15, 16], and precoding [17] can be efficiently mapped on to GP-GPUs. Moreover, several GP-GPU-based communication systems have been proposed in [18,19].In order to exploit the parallelism of the MPA platforms, we have to overcome the main disadvantage of the SD algorithm, namely, its sequential nature. It is not enough to change or modify the sequential algorithm slightly, it has to be completely redesigned.…”

mentioning

confidence: 99%

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Parallel sphere detector algorithm providing optimal MIMO detection on massively parallel architectures

Jozsa

Vidal

Martínez-Zaldívar

et al. 2015

Concurrency and Computation

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Multiple-input multiple-output (MIMO) systems have attracted considerable attention in wireless communications because they offer a significant increase in data throughput and link coverage without additional bandwidth requirement or increased transmit power. The price that has to be paid is the increased complexity of hardware components and algorithms. The sphere detector (SD) algorithm solves the problem of maximum likelihood (ML) detection for MIMO channels by significantly reducing the search space of possible solutions. The main drawback of the SD algorithm is in its sequential nature, consequently, running it on massively parallel architectures (MPAs) is very inefficient. In order to overcome the drawbacks of the SD algorithm, a new parallel sphere detector (PSD) algorithm is proposed. It implements a novel hybrid tree search method, where the algorithm parallelism is assured by the efficient combination of depth-first search and breadth-first search algorithms. A path metric-based parallel sorting is employed at each intermediate stage. The PSD algorithm is able to adjust its memory requirements and extent of parallelism to fit a wide range of parallel architectures. Mapping details for MPAs are proposed by giving the details of thread dependent, highly parallel building blocks of the algorithm. Based on the building blocks proposed, a mapping to general-purpose graphics processing unit is provided, and its performance is evaluated. In order to achieve high-throughput, several levels of parallelism are introduced, and different scheduling strategies are considered.In the first approach the robustness of MIMO is maximized, that is, the probability of error is minimized with the use of space-time codes (STCs). STCs rely on transmitting different representations of the same data stream on different parallel transmit branches, that is, it introduces controlled redundancy in both space and time.Spatial Multiplexing (SM), the second approach, focuses on maximizing the capacity of a radio link by transmitting independent data streams on different transmit branches simultaneously and within the same frequency band. The price that has to be paid is the increased complexity of detection hardware components and algorithms. The complexity of detection algorithms depends on many factors, such as antenna configuration, modulation order, channel, and coding.With regard to the bit error rate (BER) performance, the maximum likelihood (ML) detector offers the best BER performance; however, its exponential complexity is not suitable for real-time applications. The SD algorithm has been proposed in the literature to significantly reduce the search space of possible solutions while still providing the ML solution. For a few good examples, refer to [2-4] and [5].In non-optimal detectors, the complexity of the sphere detector (SD) algorithm is reduced by introducing some approximations such as (i) early termination of the search, (ii) introducing constraints on the maximum number of nodes that the detector algorithm is allowed ...

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Efficient graphics processing unit based layered decoders for quasicyclic low‐density parity‐check codes

Dou

Zou

et al. 2013

Concurrency and Computation

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Because layered low-density parity-check (LDPC) decoding algorithm was proposed, one can exploit the diversity gain to achieve performance comparable to the traditional two-phase message passing (TPMP) decoding but with about twice faster decoding convergence compared to TPMP. In order to reduce the decoding time of layered LDPC decoder, a graphics processing unit (GPU) is exploited as the modem processor so that the decoding procedure can be processed in parallel using numerous threads in the GPU. In this paper, we present the parallel algorithms and efficient implementations on the GPU for two different layered message passing schemes, the row-layered and column-layered decoding. In the experiments, the quasicyclic LDPC codes for WiFi (802.11n) and WiMAX (802.16e) are decoded by the proposed layered LDPC decoders. The experimental results show that our decoder has good bit error ratio (BER) performance comparable to TPMP decoder. The peak throughput is 712 Mbps, which is about two orders of magnitude faster than that of CPU implementation and comparable to the dedicated hardware solutions. Compared to the existing fastest GPU-based implementation, the presented decoder can achieve a performance improvement of 2.3 times. 30 R. LI ET AL.according to the construction of layers, the row-layered (RL) [4] and column-layered (CL) one [5,6]. In the CL decoding, the variable nodes (VNs) are divided to multiple layers. Similarly, the check nodes (CNs) are divided into multiple layers in the RL decoding. In this paper, both layered decoding algorithms are discussed because of their faster convergence and higher throughput.In order to reach the throughput required by the standards, dedicated application-specific integrated circuit (ASIC) solutions for LDPC decoder have been presented in recent years [7-9]. However, ASIC solutions have a long development cycle, high design cost, and fixed functionality. LDPC decoders on field programmable gate array (FPGA) [10][11][12] are also presented in recent years. FPGA provides high computation power that is required in wireless communication; the throughput of LDPC decoder can achieve over 700 Mbps. However, developers for FPGAs must learn hardware description languages and gain familiarity with the development of programming and debugging tools. Although Verilog or Verilog hardware description languages supports parameterized designs in adherence to multiple standards, the standard practice is at the register transfer level, which cannot be configured in real-time manner to apply for some scenes, such as software defined radio. Conversely, software solutions are less expensive, scalable, and flexible and have shorter development cycle.The development in circuit technology and new trends in computer architectures show that the number of cores per chip increases steadily every year at a considerable rate, which led to new forms of parallelism. As a result, many multicore platforms, such as Multicore CPUs from Intel and AMD, Cell Broadband Engines (cell/B.E) from Sony-Thosiba-IBM, and...

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Implementation of an SDR system using an MPI-based GPU cluster for WiMAX and LTE

Cited by 11 publications

References 12 publications

ETSI-Standard Reconfigurable Mobile Device for Supporting the Licensed Shared Access

ETSI-Standard Reconfigurable Mobile Device for Supporting the Licensed Shared Access

Parallel sphere detector algorithm providing optimal MIMO detection on massively parallel architectures

Efficient graphics processing unit based layered decoders for quasicyclic low‐density parity‐check codes

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