Implementation of edge detection using FPGA &amp;amp; model based approach

Dash, Prasannajit; Pujari, Shashank; Nayak, Sofia

doi:10.1109/icices.2014.7033990

Cited by 18 publications

(5 citation statements)

References 7 publications

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“…In [12] authors have implemented parallel architecture of Sobel edge detection in FPGA. [13] deals with model based approach by performing edge detection using FPGA. In [14] authors have implemented real time canny edge detection using FPGA.…”

Section: Literature Surveymentioning

confidence: 99%

Hardware Implementation of Sobel Edge Detection Algorithm

Pujare¹,

Sawant²,

Sharma³

et al. 2020

ITM Web Conf.

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In the fields of image processing, feature detection, the edge detection is an important aspect. For detection of sharp changes in the properties of an image, edges are recognized as important factors which provides more information or data regarding the analysis of an image. In this work coding of various edge detection algorithms such as Sobel, Canny, etc. have been done on the MATLAB software, also this work is implemented on the FPGA Nexys 4 DDR board. The results are then displayed on a VGA screen. The implementation of this work using Verilog language of FPGA has been executed on Vivado 18.2 software tool.

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Section: Literature Surveymentioning

confidence: 99%

Hardware Implementation of Sobel Edge Detection Algorithm

Pujare¹,

Sawant²,

Sharma³

et al. 2020

ITM Web Conf.

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“…Now, As opposed to the low-level design approach, Model Based design for FPGA are one of the methods that are based of high-level modeling for image and video processing applications on a very higher level of abstraction. Many various industrial and academic design approaches are available such as Simulink/ Xilinx System generator models, which can convert automatically into a hardware (VHDL) description [10,11].…”

Section: Related Workmentioning

confidence: 99%

Fast FPGA Prototyping based Real-Time Image and Video Processing with High-Level Synthesis

Ghodhbani¹,

Horrigue²,

Saidani³

et al. 2020

IJACSA

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Programming in high abstraction level is known by its benefits. It can facilitate the development of digital image and video processing systems. Recently, high-level synthesis (HLS) has played a significant role in developing this field of study. Real time image and video Processing solution needing high throughput rate are often performed in a dedicated hardware such as FPGA. Previous studies relied on traditional design processes called VHDL and Verilog and to synthesize and validate the hardware. These processes are technically complex and time consuming. This paper introduces an alternative novel approach. It uses a Model-Based Design workflow based on HDL Coder (MBD), Vision HDL Toolbox, Simulink and MATLAB for the purpose of accelerating the design of image and video solution. The main purpose of the present paper is to study the complexity of the design development and minimize development time (Time to market: TM) of conventional FPGA design. In this paper, the complexity of the development™ can be reduced by 60% effectively by automatically generating the IP cores and downloading the modeled design through the Xilinx tools and give more advantages of FPGA related to the other devices like ASIC and GPU.

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“…It specifies the value by whi input. ol used in image rmation from the of an object and background in the r is used [5].…”

Section: A Model Based Implementationmentioning

confidence: 99%

Moving Object Tracking Application: FPGA and Model Based Implementation Using Image Processing Algorithms

Nayak

Pujari

2015

2015 International Conference on Computing Communication Control and Automation

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With increased resource size, powerful DSP blocks and large on-chip memory, Field Programmable Gate Array (FPGA) devices play a major role as hardware platforms for implementing compute intensive video image processing applications. In this paper, image processing algorithms are used for tracking a moving video object. The image processing algorithms used are (a) Noisy video generation with random motion (b) Video image median filter (c) Video image back ground removal (d) Video image thresholding (e) Video image edge detection (f) Video image height and width calculation (g) Video image center computation (h) Video image and center image overlay. The image processing algorithms are developed initially byModel Based Design Approach using Simulink models of MATHWORK's MATLAB Tool. Then these algorithms are implemented on ALTERA CYCLONE-II FPGA device using TERASIC DE2 FPGA hardware kit and ALTERA QUARTUS-II software tool. The input video image is taken from a NTSC/PAL camera and processed in real time using the algorithms on the FPGA and the resulted tracked video image output is displayed on a VGA monitor.

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Implementation of edge detection using FPGA & model based approach

Cited by 18 publications

References 7 publications

Hardware Implementation of Sobel Edge Detection Algorithm

Hardware Implementation of Sobel Edge Detection Algorithm

Fast FPGA Prototyping based Real-Time Image and Video Processing with High-Level Synthesis

Moving Object Tracking Application: FPGA and Model Based Implementation Using Image Processing Algorithms

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