Implementing Binarized Neural Networks with Magnetoresistive RAM without Error Correction

Abstract

One of the most exciting applications of Spin Torque Magnetoresistive Random Access Memory (ST-MRAM) is the inmemory implementation of deep neural networks, which could allow improving the energy efficiency of Artificial Intelligence by orders of magnitude with regards to its implementation on computers and graphics cards. In particular, ST-MRAM could be ideal for implementing Binarized Neural Networks (BNNs), a type of deep neural networks discovered in 2016, which can achieve state-of-the-art performance with a highly reduced memory footprint with regards to conventional artificial intelligence approaches. The challenge of ST-MRAM, however, is that it is prone to write errors and usually requires the use of error correction. In this work, we show that these bit errors can be tolerated by BNNs to an outstanding level, based on examples of image recognition tasks (MNIST, CIFAR-10 and ImageNet): bit error rates of ST-MRAM up to 0.1% have little impact on recognition accuracy. The requirements for ST-MRAM are therefore considerably relaxed for BNNs with regards to traditional applications. By consequence, we show that for BNNs, ST-MRAMs can be programmed with weak (low-energy) programming conditions, without error correcting codes. We show that this result can allow the use of low energy and low area ST-MRAM cells, and show that the energy savings at the system level can reach a factor two.

Methodology for Realizing VMM with Binary RRAM Arrays: Experimental Demonstration of Binarized-ADALINE Using OxRAM Crossbar

“…An effective strategy to mitigate these effects would be to implement two separate ADALINE networks in place of a single neuron. Deep binarized multilayer networks can also be explored, using larger RRAM arrays to further improve the learning performance as shown in simulation studies [28]- [30]. It should be noted that by using binary OxRAM states (HRS/LRS), we have limited the effect of variability that would otherwise reflect in an analog resistance VMM implementation.…”

Embracing the Unreliability of Memory Devices for Neuromorphic Computing

“…We see that high energy savings can be achieved. The methodology and model for obtaining these results are presented in [13].…”