Improved decoding and error floor analysis of staircase codes

Abstract

Staircase codes play an important role as error-correcting codes in optical communications. In this paper, a low-complexity method for resolving stall patterns when decoding staircase codes is described. Stall patterns are the dominating contributor to the error floor in the original decoding method. Our improvement is based on locating stall patterns by intersecting non-zero syndromes and flipping the corresponding bits. The approach effectively lowers the error floor and allows for a new range of block sizes to be considered for optical communications at a certain code rate or, alternatively, a significantly decreased error floor for the same block size. Further, an improved error floor analysis is introduced which provides a more accurate estimation of the contributions to the error floor.

Approaching Miscorrection-Free Performance of Product Codes With Anchor Decoding

“…In this section, we discuss two PP techniques, which we refer to as bit-flip-and-iterate PP and algebraic-erasure PP. Both techniques have been studied before in the literature as a means to lower the error-floor for various GPCs assuming the conventional iterative BDD [9], [21], [26], [28]- [30].…”

“…3(c), where the involved rows and columns are indicated by the dotted lines. It is pointed out in [26] that the multiplicity of such a stopping set can be obtained by using existing counting formulas for the number of binary matrices with given row and weight weight [36]. In particular, there exist 297,200 binary matrices of size 6 × 6 with uniform row and column weight 3 [36, Table 1].…”

“…Miscorrections are highly undesirable because they introduce additional errors (on top of channel errors) into the iterative decoding process. Moreover, from a theoretical perspective, miscorrections are notoriously difficult to analyze in an iterative decoding scheme [4], [7], [14], [22]- [26]. In fact, despite the widespread use in practice and to the best of our knowledge, no rigorous analytical results exist characterizing the finite-length performance of GPCs under iterative BDD over the BSC.…”

“…Error-floor improvements are particularly important for applications with stringent reliability constraints such as optical transport networks. We therefore also discuss the application of post-processing (PP) techniques [9], [21], [26], [28]- [30], which can be combined with the proposed algorithm to reduce the error floor even further.…”

Miscorrection-free Decoding of Staircase Codes

“…For OTNs, post-FEC bit error rates below 10 −15 are typically required. In this case, other code parameters should be used or one may apply post-processing techniques to reduce the error floor below the application requirements 8 .…”