2018
DOI: 10.1109/led.2018.2843335
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Improved Dynamic RON of GaN Vertical Trench MOSFETs (OG-FETs) Using TMAH Wet Etch

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Cited by 31 publications
(32 citation statements)
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“…It is assumed that under these bias conditions, additional charges get trapped in semiconductor border traps inside the p-GaN layer for the m-plane devices rather than contributing to the inversion channel. Note that charges inside the border traps, QSBT are immobile [8] and do not contribute to the inversion channel conductivity. The location of QSBT is distributed from the semiconductor-oxide interface into the p-GaN layer, which is why their associated capacitance CSBT is less than Cch for the same amount of induced charges.…”
Section: Discussionmentioning
confidence: 99%
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“…It is assumed that under these bias conditions, additional charges get trapped in semiconductor border traps inside the p-GaN layer for the m-plane devices rather than contributing to the inversion channel. Note that charges inside the border traps, QSBT are immobile [8] and do not contribute to the inversion channel conductivity. The location of QSBT is distributed from the semiconductor-oxide interface into the p-GaN layer, which is why their associated capacitance CSBT is less than Cch for the same amount of induced charges.…”
Section: Discussionmentioning
confidence: 99%
“…The main flat is m-plane (11 00) and the secondary flat, which is 90° to the left, is a-plane (1 1 20). To avoid any confusion, the crystal orientation of the etched planes were confirmed by a sidewall wet etch process with the highly selective anisotropic etch solution tetramethylammonium hydroxide (TMAH), [8] [24]. The conductivity and quality parameters provided by the different substrate vendors' datasheets and the XRD measurements of the GaN rocking curve FWHM of the (102) diffraction plane are given in Table I.…”
Section: Gan Substrates Epitaxial Growth and Device Manufacturingmentioning
confidence: 99%
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“…A timely report on the excellent property of Al 2 O 3 /GaN on GaN interface formed by atomic layer deposition (ALD) is available and enhanced the applicability of GaN, being expanded to power devices, that is, metal‐oxide‐semiconductor field‐effect transistors (MOSFETs). In particular, a vertical MOSFET is a useful power device for achieving a high breakdown voltage and a low on‐resistance . To construct power devices, including vertical MOSFETs, ion implantation is a convenient method of obtaining a selectively doped region.…”
Section: Introductionmentioning
confidence: 99%
“…On the other hand, by the virtue of the superior natures of GaN, the bulk GaN vertical field effect transistor (VFET) attracts more and more attention due to the easier realization of enhancement-type functionality and the full utilization of the vertical region [1922]. Many novel structures are presented by experiments or simulations to incline the BV and simultaneously reduce the on-state resistance ( R ON ) [2325]. However, not to mention the difficulties in fabricating the super-junction (SJ) in GaN, the lack of the high-mobility two-dimensional electron gas (2DEG) leads to a higher R ON [26], which hinders the optimization of BFOM in such devices.…”
Section: Introductionmentioning
confidence: 99%