Improved Frequency Compensation Technique for Three-Stage Amplifiers

The advancement of CMOS technology limits designers' options for multi‐stage configurations as a promising alternative to cascade structures. The main issue of designing multi‐stage amplifiers is frequency compensation since cascade structures are volatile. An efficient three‐stage amplifier, which is frequency compensated using a fully differential block, is proposed in this work. The differential block enhances the Miller effect to reduce the size of compensation capacitors, and this leads to less die occupation. The compensation network shares the differential block between two Miller loops while two Miller capacitors at the outputs of the differential block cause pole‐zero cancelation to increase operating frequency range. The proposed structure is modeled by a linear transfer function and simulated via HSPICE software using 0.180.25emμm0.25em CMOS library. Simulation results indicate excellent performance and acceptable robustness against parameter mismatches and probable fabrication errors. According to the simulations, the proposed amplifier has a DC gain of 1050.25emdB, a gain‐bandwidth product of 4.80.25emMHz, a phase margin of 72°, and a power dissipation of 3600.25emμW. The high performance of the proposed three‐stage amplifier with an enhanced figure of merit makes it a perfect alternative to the amplifiers based on the conventional reverse nested Miller compensation.

Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Three‐stage CMOSamplifier: Frequency compensated using fully differential block

Bandari

Setoudeh

Tavakoli

et al. 2022

“…Almost any electronics system can be realized by amplifiers from comparators to data convertors. [1][2][3] So, demands for high-performance amplifiers always exist. Usually, two general approaches are available to design operational amplifiers.…”

Section: Introductionmentioning

confidence: 99%

“…Operational amplifiers are considered as building basic blocks in analog and mixed‐mode electronics. Almost any electronics system can be realized by amplifiers from comparators to data convertors 1–3 . So, demands for high‐performance amplifiers always exist.…”

Section: Introductionmentioning

confidence: 99%

Four‐stage CMOS operational transconductance amplifier: Compensated via double differential blocks

Roohbakhsh¹,

Sanaee

Aghaee

2022

Advancements in integrated circuits technology, force designers to adopt methods and approaches with posed limitations. Nowadays, multistage amplifiers are widely in demand due to high‐gain performance while avoiding placing transistors vertically in contrast with cascode structures. In this work, a four‐stage amplifier is investigated and frequency is compensated via a compensation network that includes two Miller capacitors at the outputs of differential blocks. So, using two Miller capacitors and sharing these capacitors common in four Miller loops, provide an opportunity to achieve acceptable frequency response regarding gain‐bandwidth product and phase margin. The proposed amplifier is modeled symbolically and simulated with the HSPICE circuit simulator with the help of 0.18 μm CMOS technology. According to the simulation results, the proposed approaches show superior performance compared with previously existing methods. Additionally, the sensitivity of the proposed amplifier against load and compensation capacitors expresses a stable and relatively fixed frequency response. Such a high gain amplifier with more than 180 dB as DC gain and 88° phase margin, is in great demand for realizing modulators and data converters.

“…The major part of methods is related to three‐stage amplifiers while four‐stage cases are highlighted recently for their high DC gain. Logically, more nodes in amplifier leads to more complicated compensation network 18–26 . So, design simplicity attracts attention since complex structures are less reliable for many reasons such as fabrication mismatches and heavy theoretical calculations.…”

Section: Introductionmentioning

confidence: 99%

Five‐stage CMOS OTAfrequency compensated via nested differential feedback

Zanjani

Sadrnia

Biabanifard

2022

Nowadays cascode structures or vertical arrangements of MOSFETs can not satisfy demands regarding high gain amplifiers. As a direct result, the only promising choice turns to Multi-stage amplifiers via cascading gain stages. The challenge here is stability issues which shows itself by different frequency compensation. All problem starts with increasing number of nodes and consequent poles. The poles degenerate phase of system and need to be controlled. In this work, a five-stage amplifier is targeted for a new and efficient frequency compensation technique. The major contribution of proposed approach is using only two Miller capacitors with considerable small values (10 pF) compared to load capacitor (500 pF). This achieved via exploiting two differential active stages which intensify Miller effect and provide capability to share Miller capacitor at multiple loops simultaneously. The proposed amplifier with corresponding frequency compensation is described symbolically while a circuit level implementation is performed via HSPICE circuit simulator and TSMC 0.18 μm CMOS technology. Based on simulation results, the proposed amplifier expresses a DC gain of 195 dB, a gain bandwidth product of 15.2 MHz, a phase margin of 90 , and a power dissipation of 570 μW.