Improved post-silicon power modeling using AC lock-in techniques

Abstract

The objective of power modeling is to estimate the power consumption of integrated circuits under different workloads and variabilities. Post-silicon power modeling is an essential step for design validation and for building trustable pre-silicon power models and analyses. One popular approach for devising post-silicon power estimates is to translate the thermal emissions from the backside of the die into power estimates. Such approach faces a major physical challenge arising from spatial heat diffusion which blurs the resultant thermal images. The objective of this paper is to improve post-silicon power mapping by utilizing lock-in thermography techniques where AC signals, rather than DC signals, are used to excite the circuit blocks. We prove and demonstrate that using AC excitation sources reduces the extent of spatial heat diffusion. We devise a lock-in based thermal to power inversion methodology that maps spatial power consumption on a real chip. Using a custom test chip, we are to able to scientifically quantify and validate the improvements in power mapping attained from the proposed techniques. We show that our technique reduces the power mapping errors by more than half.

Post-Silicon Estimation of Spatiotemporal Temperature Variations Using MIMO Thermal Filters

“…Here, T ( r , t) is temperature and p( r , t) is power density at r . Among several approaches solving (3), Green's function approach well describes the temperature change at r with respect to power sources at different locations, r j = ( r − r j ) [23]. Using Green's function, temperature at r can be computed by…”

“…The gain far from the power source decreases relatively slower as the frequency ω k increases. This is mainly because the heat energy does not affect the temperature at remote locations when the power oscillates quite fast; note that more heat flows vertically to a heat spreader when the frequency of power source increases [23]. For the simplicity, we use the same phase response obtained at the closest sensor location.…”

Runtime power estimator calibration for high-performance microprocessors

“…In this case, one compensation/calibration is enough for the whole estimation time. If the condition is not satisfied, we can perform the error compensation process (12) and (13) periodically or at the time when the temperature errors at the thermal sensors exceed a threshold.…”

“…However, we cannot put thermal sensors all over the chip in reality. The number of sensors is always limited and as a result, it is impossible to obtain all the elements of OT(t) in (12). In this subsection, we show how to exploit the power estimator and limited thermal sensor information and approximately recover the full-chip temperature.…”

“…Note that all these steps should be performed off-line, such that the error can be better controlled and no overhead is introduced at runtime. Please see [12], [13] for details of the reverse power calculation. The errors of the functional block powers are obtained as JU = U -(; By definition, correlation matrix is a symmetric matrix con taining the correlation values of each random variable pair.…”