2015 86th ARFTG Microwave Measurement Conference 2015
DOI: 10.1109/arftg.2015.7381473
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Improved RSOL planar calibration via EM modelling and reduced spread resistive layers

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Cited by 9 publications
(5 citation statements)
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“…12. Photograph of 0.5-and 5-k CPW impedance standards manufactured on a fused-silica substrate, using a dedicated aluminum on titanium process developed at the Delft University of Technology [24], [25]. Fig.…”
Section: Measurement Experiments and Discussionmentioning
confidence: 99%
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“…12. Photograph of 0.5-and 5-k CPW impedance standards manufactured on a fused-silica substrate, using a dedicated aluminum on titanium process developed at the Delft University of Technology [24], [25]. Fig.…”
Section: Measurement Experiments and Discussionmentioning
confidence: 99%
“…12. The impedance standards are designed with nominal impedance of 0.5 (Z low ) and 5 k (Z high ) [24], [25].…”
Section: A Broadband Planar Measurementsmentioning
confidence: 99%
“…We used the models provided by the vendor for the SOL standards. More accurate models e.g., based on full-wave simulation of SOL standards [19]- [20] can be used for the extraction. In addition, the SOL method can be replaced with an over-determined set of offset shorts for probe characterization [21].…”
Section: B On-wafer Calibrationmentioning
confidence: 99%
“…To improve the accuracy of the standard definitions, and thus, in turn of the probe level calibration, this work described the procedures for the extraction, as a function of temperature, of the electrical parameters of the conductive and dielectric layers composing two commercially available impedance standard substrates (i.e., Alumina-based and Quartz-based). Furthermore, the mechanical shrinkage due to the temperature change from room temperature to cryogenic one is derived, and the method of [8] and [9] is employed to define the frequency-dependent response of the artifacts used in the calibration procedure.…”
Section: Introductionmentioning
confidence: 99%