Improved tangent space based distance metric for accurate lithographic hotspot classification

Guo, Jing; Yang, Fan; Sinha, Subarna; Chiang, Charles; Zeng, Xuan

doi:10.1145/2228360.2228577

Cited by 25 publications

(6 citation statements)

References 8 publications

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“…It is sen sitive to the small variations or shifts of the shapes. In [28], an Improved Tangent Space (ITS) based metric is proposed for hotspot classification. It is an extension of the well-developed tangent space methods [29,30] in computer vision community.…”

Section: A2 Pattern Matching Approachmentioning

confidence: 99%

Machine learning and pattern matching in physical design

Pan

Matsunawa

et al. 2015

The 20th Asia and South Pacific Design Automation Conference

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A BSTRACTMachine learning (ML) and pattern matching (PM) are pow erful computer science techniques which can derive knowledge from big data, and provide prediction and matching. Since nanometer VLSI design and manufacturing have extremely high complexity and gigantic data, there has been a surge re cently in applying and adapting machine learning and pat tern matching techniques in VLSI physical design (including physical verification), e.g., lithography hotspot detection and data/pattern-driven physical design, as ML and PM can raise the level of abstraction from detailed physics-based simulations and provide reasonably good quality-of-result. In this paper, we will discuss key techniques and recent results of machine learning and pattern matching, with their applications in phys ical design.

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Section: A2 Pattern Matching Approachmentioning

confidence: 99%

Machine learning and pattern matching in physical design

Pan

Matsunawa

et al. 2015

The 20th Asia and South Pacific Design Automation Conference

Self Cite

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“…The representative hotspot in each cluster is then identified and stored in a hotspot library for future hotspot detection. The clustering method is further extended in [19] using an improved tangent space based distance metric to achieve better accuracy.…”

Section: E Clustering In Hotspot Detectionmentioning

confidence: 99%

Lithography hotspot detection and mitigation in nanometer VLSI

Gao

Ding

et al. 2013

2013 IEEE 10th International Conference on ASIC

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Abstract-With continued feature size scaling, even state of the art semiconductor manufacturing processes will often run into layouts with poor printability and yield. Identifying lithography hotspots is important at both physical verification and early physical design stages. While detailed lithography simulations can be very accurate, they may be too computationally expensive for full-chip scale and physical design inner loops. Meanwhile, pattern matching and machine learning based hotspot detection methods can provide acceptable quality and yet fast turn-around-time for full-chip scale physical verification and design. In this paper, we discuss some key issues and recent results on lithography hotspot detection and mitigation in nanometer VLSI.

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“…2 shows a ML accelerated ILT mask synthesis flow. Related prior works include simple random sampling and geometrical pattern classification [1][2][3][4][5][6][7][8][9] , which generates geometrical representation of pattern clips in different forms and then forms groups by adopting different clustering algorithms. One full chip application 9 extracts a set of characteristic design patterns evenly distributed within the design space occupied by the layout sampling design, which is comprised of billions of patterns.…”

Section: Introductionmentioning

confidence: 99%

Automatic generation of representative and diversified pattern samples from a full chip layout

Zhu

Falch

Braam

et al. 2023

DTCO and Computational Patterning II

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To successfully transfer design patterns to wafer, it is essential to calibrate different types of models to describe the optical, physical, and chemical effects in chip manufacturing process. In recent years, there have also been active investigations of machine learning (ML) models to capture various aspects of semiconductor processes. As it is well known, model training time and model accuracy are heavily influenced by the input data. It is becoming increasingly important to provide highly efficient methods to automatically generate effective pattern samples from full chip designs. A straightforward approach, simple random sampling, can be highly efficient to generate effective samples for a homogeneous population. However, real world chip layouts are characterized by geometrical and lithographical feature distributions that vary significantly across the full chip design space. The complexity of the problem necessitates the adoption of a comprehensive set of approaches for sampling as well as flexibility in customizing the sampling strategy for various applications. In this paper, we investigate automatic layout sampling to optimize the coverage and diversity of patterns given the need for minimizing training sample size or other constraints, and therefore adopting various unsupervised learning techniques. The flow scales very well with computation resources to efficiently process full chip layouts. A simple, standard interface is provided for typical usage, but flexible programming APIs are available to customize the sampling strategy for advanced applications. Results demonstrate that the samples generated by this flow have increased diversity, which leads to significantly reduced model training time with comparable or increased model accuracy.

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Improved tangent space based distance metric for accurate lithographic hotspot classification

Cited by 25 publications

References 8 publications

Machine learning and pattern matching in physical design

Machine learning and pattern matching in physical design

Lithography hotspot detection and mitigation in nanometer VLSI

Automatic generation of representative and diversified pattern samples from a full chip layout

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