Improvement in gate LWR with plasma curing of ArF photoresists

Ando, Atsushi; Matsui, Eriko; Matsuzawa, Nobuyuki; Yamaguchi, Yasunori; Kugimiya, K.; Yoshida, Mineo; Salam, K. M. A.; Kusakabe, T.; Tatsumi, Takahide

doi:10.1016/j.tsf.2006.10.051

Cited by 8 publications

(8 citation statements)

References 1 publication

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“…These include the use of a multilayer resist system with O 2 plasma treatment, which is an application similar to oxygen ashing. [42][43][44][45][46]…”

Section: Critical Issuse For Practical Ashing Processesmentioning

confidence: 99%

Developments of Plasma Etching Technology for Fabricating Semiconductor Devices

Abe¹,

Yoneda

Fujiwara

2008

jjap

285

163

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Plasma etching technologies such as reactive ion etching (RIE), isotropic etching, and ashing/plasma cleaning are the currently used booster technologies for manufacturing all silicon devices based on the scaling law. The needs-driven conversion from the wet etching process to the plasma/dry etching process is reviewed. The progress made in plasma etching technologies is described from the viewpoint of requirements for the manufacturing of devices. The critical applications of RIE, isotropic etching, and plasma ashing/cleaning to form precisely controlled profiles of high-aspect-ratio contacts (HARC), gate stacks, and shallow trench isolation (STI) in the front end of line (FEOL), and also to form precise via holes and trenches used in reliable Cu/low-k (low-dielectric-constant material) interconnects in the back end of line (BEOL) are described in detail. Some critical issues inherent to RIE processing, such as the RIE-lag effect, the notch phenomenon, and plasma-induced damage including charge-up damage are described. The basic reaction mechanisms of RIE and isotropic etching are discussed. Also, a procedure for designing the etching process, which is strongly dependent on the plasma reactor configuration, is proposed. For the more precise critical dimension (CD) control of the gate pattern for leading-edge devices, the advanced process control (APC) system is shown to be effective.

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“…These include the use of a multilayer resist system with O 2 plasma treatment, which is an application similar to oxygen ashing. [42][43][44][45][46]…”

Section: Critical Issuse For Practical Ashing Processesmentioning

confidence: 99%

Developments of Plasma Etching Technology for Fabricating Semiconductor Devices

Abe¹,

Yoneda

Fujiwara

2008

jjap

285

163

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“…Bulk chemical modifications from VUV photons are observed post‐exposure using ex situ transmission FTIR. This technique is also commonly used for characterization after plasma exposure 5, 10–13, 16. Surface morphology is characterized quantitatively using tapping mode atomic force microscopy (AFM).…”

Section: Experimental Partmentioning

confidence: 99%

“…However, plasmas can also be used post‐development to help smooth the PR, and/or make it less susceptible to roughening during subsequent plasma etch steps. This has resulted in exploration of plasma pretreatments, also known as plasma “cures,” designed to increase the etch resistance and decrease the roughening of 193 nm PR during the subsequent plasma etch step 10–14. Pargon et al have shown that most of the plasma pretreatment smoothing effect is related to vacuum ultraviolet (VUV) radiation from the plasma 15.…”

Section: Introductionmentioning

confidence: 99%

Understanding the Roughening and Degradation of 193 nm Photoresist during Plasma Processing: Synergistic Roles of Vacuum Ultraviolet Radiation and Ion Bombardment

Nest

Chung

Graves

et al. 2009

Plasma Processes & Polymers

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We have identified a synergistic roughening mechanism of 193 nm photoresist, where simultaneous ion bombardment, vacuum ultraviolet (VUV) radiation, and moderate substrate heating in a well‐characterized beam system results in a similar level of surface roughness observed during conditions typical of plasma etching. VUV radiation (147 nm) results in bulk modification of the photoresist polymer, witnessed by the loss of carbon–oxygen bonds through transmission FTIR. Ion bombardment (150 eV) results in the formation of a densified surface layer on the order of a few nanometers in depth. We have shown that elevated levels of roughness are observed only during simultaneous exposure and that sequential exposure is not sufficient to produce surface roughness. In addition, through the use of transmission FTIR we have shown that an etching synergy does not exist and that etch rates are nearly independent of temperature. We propose that the observed roughness could be due to the drastically different mechanical properties of the ion‐modified near‐surface region and VUV‐modified bulk photoresist, where the difference is exaggerated at elevated temperatures. A more complete understanding of plasma‐induced surface roughness will require further study, resulting in the improvement of existing pattern transfer technologies and possibly novel new technologies as well.

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“…The PR pattern is partially transferred into the gate stack during the subsequent plasma etching steps. [13][14][15][16][17] To meet the 22 nm technological node requirements, the postlithography treatments should reduce the LWR by at least 50%, while maintaining the gate CD within the 10% CD tolerance imposed by the ITRS. This means that a 50% LWR improvement is at least necessary to meet the 1.6 nm LWR aimed for the 22 nm technological node.…”

Section: Introductionmentioning

confidence: 99%