Improvement of cohesion strength in ULK OSG materials by pore structure adjustment

Krishtab, Mikhail; Vanstreels, Kris; Savage, Travis; Matsunaga, Kentaro; Gendt, Stefan De; Baklanov, Mikhaı̈l R.

doi:10.1016/j.mee.2015.02.038

Cited by 3 publications

(2 citation statements)

References 11 publications

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“…30 Recently, Krishtab and co-authors experimentally showed that the cohesive strength of liquid phase self-assembly (LPSA) low-k dielectrics could be improved by tailoring its pore structure. 31 The main advantage of LPSA over PECVD low-k dielectrics is the ability to suppress the coupling between pore size and porosity, and thereby separating their contribution to the film strengthening. Two major distinctions between the dielectric films were found, i.e.…”

Section: Impact Of Porosity and Pore Morphology On Mechanical Stabilitymentioning

confidence: 99%

Mechanical Stability of Porous Low-k Dielectrics

Vanstreels

Baklanov

2014

ECS J. Solid State Sci. Technol.

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This paper reviews the mechanical and fracture properties of porous ultralow-k dielectrics with the focus on chip package interaction related issues. It is shown that the mechanical and fracture properties of porous ultralow-k dielectric films are closely linked with porosity, pore morphology, network structure and deposition technology, while their fracture properties are also sensitive to reactive species in the environment. The survivability of low-k dielectrics upon integration, package assembly and subsequent reliability tests is therefore a combination of their mechanical stability, fracture properties, the specific mechanical or thermo-mechanical load and environmental effects. For the past three decades, the semiconductor industry has been improving the performance of microelectronic devices and the functionality of advanced integrated circuits through the continuous scaling of integrated circuits and the maximization of transistor density.1 Consequently, this encourages the introduction of new materials, processes, chip designs, and packaging strategies into micro-/nano-electronic products. Among these material innovations are insulating materials with a dielectric constant (k) less than that of SiO 2 , so called low-k dielectrics. During the last 15 years, various materials and methods have been developed for fabricating low-k dielectric films, among which the plasma enhanced chemical vapor deposition (PECVD) technology of porous organosilicate glasses (OSG) is the most popular due to its better compatibility with the technological needs.2-5 The reduction in k for low-k dielectrics is being pursued through the introduction of controlled levels of porosity. However, finding a good low-k material has proven to be much more challenging than first expected due to a number of integration and reliability issues.1 Besides the need of being compatible with the different lithography, etching, stripping and cleaning processes that are used in state-of-the-art integration schemes, they must also have sufficient mechanical strength to withstand the high shear stresses as well as harsh chemical environments that are involved during the chemical mechanical polishing process without cohesive or adhesive failure occurring.6-8 On top of that, since low-k dielectrics exhibit intrinsic tensile stresses and have increased coefficients of thermal expansion compared to SiO 2 , thin film cracking and adhesion are serious thermal-mechanical reliability issues for low-k dielectric materials (Figure 1). 9,10 Thermo-mechanical deformation of the package during package assembly and subsequent reliability tests can induce large local stresses that can initiate and propagate cohesive and/or adhesive cracks in different back-end of line (BEOL) layers.11 Therefore, a careful characterization of the mechanical integrity of potential new low-k candidates is required to integrate these new materials and Cu interconnects and to assure reliability during chip packaging and under field conditions. In the microelectronics industry, the elas...

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Section: Impact Of Porosity and Pore Morphology On Mechanical Stabilitymentioning

confidence: 99%

Mechanical Stability of Porous Low-k Dielectrics

Vanstreels

Baklanov

2014

ECS J. Solid State Sci. Technol.

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“…The main advantage of LPSA over PECVD low-k dielectrics is the ability to separately engineer pore size and open porosity using a variety of templates. 13 Study of material properties was first performed on a flat wafer with bare Si as substrate. After soft bake, FTIR shows a large amount of porogen peaks in the range of 3000-2800 cm À1 and 1200-1100 cm À1 .…”

Section: Damage Free Integration Of Ultralow-k Dielectrics By Template Replacement Approachmentioning

confidence: 99%

Damage free integration of ultralow-k dielectrics by template replacement approach

Zhang

Marneffe

Heylen

et al. 2015

Applied Physics Letters

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Cu/low-k integration by conventional damascene approach is becoming increasingly difficult as critical dimensions scale down. An alternative integration scheme is studied based on the replacement of a sacrificial template by ultralow-k dielectric. A metal structure is first formed by patterning a template material. After template removal, a k ¼ 2.31 spin-on type of porous low-k dielectric is deposited onto the patterned metal lines. The chemical and electrical properties of spin-on dielectrics are studied on blanket wafers, indicating that during hard bake, most porogen is removed within few minutes, but 120 min are required to achieve the lowest k-value. The effective dielectric constant of the gap-fill low-k is investigated on a 45 nm 1 = 2 pitch Meander-Fork structure, leading to k eff below 2.4. The proposed approach solves the two major challenges in conventional Cu/low-k damascene integration approach: low-k plasma damage and metal penetration during barrier deposition on porous materials. V

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