Damage free integration of ultralow-k dielectrics by template replacement approach

Zhang, L.; Marneffe, Jean‐François de; Heylen, N.; Murdoch, Gayle; Tőkei, Zsolt; Boemmels, J.; Gendt, Stefan De; Baklanov, Mikhaı̈l R.

doi:10.1063/1.4930072

Cited by 24 publications

(21 citation statements)

References 20 publications

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“…As can be seen, a 400 C thermal anneal burns out most of the porogen and increases the open porosity. In a previous study, 26 most of the porogen get easily desorbed within 30 minutes, leading to an open porosity around 32% and k-value ¼ 2.53 at 100 kHz. However, the residuefree removal of porogen is rather difficult in this way, requiring treatments of several hours.…”

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confidence: 81%

“…In spite of many research efforts on Cu direct etch and gap fill dielectrics, [23][24][25] there has been limited success in providing satisfactory morphological profile and electrical performance in the technology-relevant dimensions. The present work investigates a "replacement" integration approach 26 that essentially relies on metal patterning by using a sacrificial template, which is afterwards replaced by a gap-filling ultralow-k dielectric. Fig.…”

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confidence: 99%

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Cu passivation for integration of gap-filling ultralow-k dielectrics

Zhang

Marneffe

Leśniewska

et al. 2016

Applied Physics Letters

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For Cu/low-k interconnects, the reversed damascene is an alternative integration approach where the metal wires are patterned first and then the spacing filled with a flowable dielectric. In this paper, the replacement of a sacrificial template by gap-filling ultralow-k dielectrics is studied, focusing on yield and transport performance (“replacement dielectric” scheme). On non-passivated copper, the low-k curing processes induce severe damage to the metal lines, leading to the degraded electrical properties. This is confirmed by chemical inspection on the blanket Cu films and morphological inspection on patterned structures. In order to avoid Cu oxidation and out-diffusion at elevated temperature, Cu passivation by plasma-enhanced chemical vapor deposition SiCN is proposed and studied in detail. The inter-metal dielectric properties of replacement low-k are evaluated by resistance-capacitance and IV measurements using a Meander-Fork structure. By tuning the passivation layer thickness and ultraviolet curing time, high electrical yield is obtained with integrated porous low-k showing promising effective k-values (keff) and breakdown voltages (Ebd), confirming the interest of this specific integration scheme.

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confidence: 81%

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confidence: 99%

Cu passivation for integration of gap-filling ultralow-k dielectrics

Zhang

Marneffe

Leśniewska

et al. 2016

Applied Physics Letters

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“…Razvanov et al grafted polymers of PMMA and PS for pore sidewall protection. Zhang et al reported an integration scheme on the basis of the replacement of a sacrificial template of a low‐k dielectric after all metallization process steps. After the removal of the plasma‐damaged template, a spin‐on type of porous low‐k dielectric (k = 2.31) is deposited onto the patterned metal lines.…”

Section: Process Optimizations and Improvementsmentioning

confidence: 99%

“…Both fluorine and methyl group doping enlarge the network pore size of organosilica. Liu et al determined the chemical composition, pore structure, and mechanical properties of porous low‐k films with various concentrations of terminal methyl groups . They found that methyl groups degrade Young's modulus of organosilica films, indicating lower mechanical properties because the pore size increases with the concentration of methyl groups and pores change from cylindrical to ink‐bottle shaped .…”

Section: Challengesmentioning

confidence: 99%

Review of methods for the mitigation of plasma‐induced damage to low‐dielectric‐constant interlayer dielectrics used for semiconductor logic device interconnects

Miyajima

Ishikawa

Sekine

et al. 2019

Plasma Processes & Polymers

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The developments in advanced interconnect technology for semiconductor logic devices for the mitigation of plasma‐induced damage to low‐dielectric‐constant (low‐k) materials, including fluorosilicate glass and carbon‐doped silicon oxide is reviewed. The chemical bond structures of low‐k materials are summarized to help mitigate the k value degradation caused by moisture uptake after plasma processes. Damage suppression is accomplished by integrating deposition chemistries, pattern etch transfer, and post‐etch cleaning technologies. On the basis of analyses results, a discussion on the bond engineering of low‐k materials and their degradation during plasma processing is given. Challenges facing low‐k interconnect technology are also addressed.

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“…In this case, the dielectric deposition after metal patterning must have a good gap filling capability but the plasma etch step of low-k dielectric is excluded. 7 The gap filling is fundamentally a challenging task for PECVD and therefore other deposition techniques must be evaluated.In the case of spin-on OSGs, the synthesis occurs by means of a sol-gel reaction. As starting precursors, different organosilanes can be used.…”

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confidence: 99%

Effect of Bridging and Terminal Alkyl Groups on Structural and Mechanical Properties of Porous Organosilicate Films

Nenashev

Wang

Liu

et al. 2017

ECS J. Solid State Sci. Technol.

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Chemical composition, pore structure and mechanical properties of porous organosilicate low-k films with terminal and bridging organic groups are studied. It is shown that BTMSE based low-k films with alkyl bridge between the Si atoms have non-uniform pore structure with internal voids (ink-bottle like pores) while the films with terminal alkyl groups have pores with cylindrical shape. All studied spin-on deposited films have better mechanical properties than PECVD films with similar chemical composition and porosity. The best mechanical properties showed alkyl bridged low-k films. Moreover, the Young's modulus increases with BTMSE content because of higher concentration of bridging bonds. Porous organosilicate glasses (OSG) have many different applications such as catalysts, adsorbents, trapping agents, drug delivery agents, stationary phases in chromatography and chemical sensors. 1One of the most important applications of porous OSG films is related to interconnects in advanced ULSI (ultra large-scale integration) devices where they are used as insulators with low dielectric constant. Modern ICs can be made very compact, incorporating up to several billions transistors and other electronic components in an area of about 1 cm 2 . All transistors and other IC components have to be electrically interconnected to provide the proper functionality. The width of the conducting lines that connect different transistors in a circuit is becoming very small; in 2008, it dropped below 100 nm, and now is of the order of a few tens of nm. In parallel, the interconnect delay is becoming an increasing limitation factor of the overall signal propagation delay. The low dielectric constant materials are needed to reduce capacitance (C) between the metal (Cu) conductors. Together with low resistivity (R) of metal wires, low-k materials improve ULSI device performance by decreasing RC delay, cross talk noise and power consumption in interconnects.2 Different types of organosilicate films deposited by plasma enhanced chemical vapor deposition (PECVD) and spin-on glass (SOG) technology have been developed during the last 20 years. Using of appropriate precursors allows to control the chemical composition and porosity of these films. PECVD is currently the method of choice in microelectronic industry because this technique is easily integrated in the existing device manufacturing process.3 PECVD precursors (normally different types of organosilanes) are transferred to the reaction chamber where Si wafer is located on a heated pedestal. Quality of the deposited films depends on plasma characteristics and pedestal temperature. In the modern interconnect technology, the dielectric layer is deposited by PECVD and patterned first before the metal deposition using lithography and plasma etching. Lithography and plasma etching define the structure of interconnect wiring by forming certain patterns in the dielectric film. Then copper should fill the patterns in the dielectric film by superfilling electrodeposition and after chemicalmechanica...

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Damage free integration of ultralow-k dielectrics by template replacement approach

Cited by 24 publications

References 20 publications

Cu passivation for integration of gap-filling ultralow-k dielectrics

Cu passivation for integration of gap-filling ultralow-k dielectrics

Review of methods for the mitigation of plasma‐induced damage to low‐dielectric‐constant interlayer dielectrics used for semiconductor logic device interconnects

Effect of Bridging and Terminal Alkyl Groups on Structural and Mechanical Properties of Porous Organosilicate Films

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