Cu passivation for integration of gap-filling ultralow-k dielectrics

Abstract

For Cu/low-k interconnects, the reversed damascene is an alternative integration approach where the metal wires are patterned first and then the spacing filled with a flowable dielectric. In this paper, the replacement of a sacrificial template by gap-filling ultralow-k dielectrics is studied, focusing on yield and transport performance (“replacement dielectric” scheme). On non-passivated copper, the low-k curing processes induce severe damage to the metal lines, leading to the degraded electrical properties. This is confirmed by chemical inspection on the blanket Cu films and morphological inspection on patterned structures. In order to avoid Cu oxidation and out-diffusion at elevated temperature, Cu passivation by plasma-enhanced chemical vapor deposition SiCN is proposed and studied in detail. The inter-metal dielectric properties of replacement low-k are evaluated by resistance-capacitance and IV measurements using a Meander-Fork structure. By tuning the passivation layer thickness and ultraviolet curing time, high electrical yield is obtained with integrated porous low-k showing promising effective k-values (keff) and breakdown voltages (Ebd), confirming the interest of this specific integration scheme.

Evaluation of Mechanical Properties of Porous OSG Films by PFQNM AFM and Benchmarking with Traditional Instrumentation

“…However, PECVD technology faces challenges when it is necessary to deposit materials with k -value smaller than 2.5. − Chemical solution deposition (CSD) or spin-on deposition techniques can be considered as more suitable for deposition of ultralow- k dielectrics . CSD provides better pore size control as a result of evaporation-induced self-assembly (EISA), , easily incorporates bridging organic linkers between silicon atoms to improve mechanical properties (e.g., Si–CH 2 –Si, −Si–C 2 H 4 –Si, and −Si–C 6 H 4 –Si), − and has gap filling (planarization) capability that is necessary for subtractive integration (metal patterning first) allowing to avoid plasma-induced damage of low- k material and to scale the thickness of diffusion barriers. , Several excellent reviews are dedicated to deposition of ultralow- k dielectrics by CSD and spin-on technology. Their detailed analysis is outside of the scope of this paper, and more detailed description of deposition processes and important references can be found in the Supporting Information.…”