Improvement of Deadbeat Control for PV Converter

Zhang, Liyue; Zeng, Fang; Zhang, Weiliang; Su, Yun; Zhou, Chunjie; Pan, Shunde; Ye, Chenge

doi:10.2991/ecae-17.2018.42

Cited by 2 publications

(1 citation statement)

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“…Any UPS system has two operating modes: backup mode and bypass mode. Ideally, a UPS should be able to deliver a regulated sinusoidal output voltage with low THD during the two modes and includes a dead-beat controller [4][5][6][7][8][9][10]. In [6,11], the dead-beat controller is used with the disturbance observer for proper response and robust controlled performance.…”

Section: Introductionmentioning

confidence: 99%

Processor-in-the-Loop Validation of an Observer Current-based Dead-Beat Control for a Single-Phase UPS Inverter

Saoudi

Benguesmia²,

Chouder³

2023

Eng. Technol. Appl. Sci. Res.

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This paper presents a dead-beat control algorithm for Uninterruptible Power Supply (UPS) applications of single-phase inverters. The proposed control method requires the measurement of capacitor current and output voltage in order to keep the output voltage sinusoidal ensuring high dynamic performance even under load changes. The dead-beat controller optimizes the behavior of the system by eliminating the error between the output and the reference voltage without increasing the number of current sensors, which are costly, and eliminates load voltage distortions and restores the system state in the event of external shutdown-loop road interference. In this paper, we propose a capacitor current estimation based on the Luenberger observer. Processor-In-the-Loop (PIL) is a test method that allows us to create and evaluate controllers by running built-in C code on the DSP scheduled for the controller during simulated PSIM power phase control. It can be seen that the simulation results match the PIL test results, which proves the validity of the proposed controller.

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