Improvement of Endurance and Data-retention in 40nm TaO&lt;inf&gt;X&lt;/inf&gt;-based ReRAM by Finalize Verify

Fukuyama, Seiji; Matsuda, Shinpei; Yasuhara, Ryo; Takeuchi, Ken

doi:10.1109/nvmts.2018.8603105

Cited by 4 publications

(6 citation statements)

References 7 publications

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“…23) However, NVM devices have non-ideal properties such as quantization error of memory device conductance, conductance variation, and wearing out by switching. [24][25][26][27][28][29] Figures 9(a) and 9(b) show the measured conductance variation of an ReRAM memory device 30,31) at Set/Reset 10 4 cycles and 10 6 Set/Reset cycles, respectively. ReRAM can switch between HRS and LRS.…”

Section: Nvm Device Non-ideality In Cimmentioning

confidence: 99%

Tiny and error-tolerant ConvLSTM for event-based vision sensor with optimized event representation and ReRAM computation-in-memory

Higuchi¹,

Kobayashi²,

Misawa³

et al. 2023

Jpn. J. Appl. Phys.

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This paper proposes tiny and error tolerant Convolutional LSTM (ConvLSTM) for event-based vision sensor (EVS) data processing with Computation-in-Memory (CiM) that utilizes ReRAM. To handle the event data by ConvLSTM, the type and parameter of event representation are optimized to pre-process event data. To realize tiny and error tolerant ConvLSTM CiM, reduction of the bit precision and error tolerance in each ConvLSTM layer and weight are considered. On the other hand, reducing the bit precision degrades inference accuracy and error tolerance. ReRAM has non-idealities such as conductance variation and worn out by Set/Reset cycles that induces bit inversion. Thus, bit error rate at each Set/Reset cycles are investigated, and the bit precision of the weight is optimized to accept bit error rate of 0.1% in simulation. The proposed tiny ConvLSTM can reduce the size of memory by 91% compared with non-optimized ConvLSTM of that weight is represented in 32-bit precision.

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Section: Nvm Device Non-ideality In Cimmentioning

confidence: 99%

Tiny and error-tolerant ConvLSTM for event-based vision sensor with optimized event representation and ReRAM computation-in-memory

Higuchi¹,

Kobayashi²,

Misawa³

et al. 2023

Jpn. J. Appl. Phys.

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“…In this work, only the reliability of LRS is analyzed because HRS is highly reliable. Three conventional write techniques, verify, 30) finalize_verify, 27) and relaxation effect, 29) are chosen for comparison. Verify operation repeats writing memory cells until the cell current reaches the predetermined criteria.…”

Section: Data-retention Lifetimementioning

confidence: 99%

“…CF expands the crosswise as set/reset cycling increases in conventional technique. 27,28) Consequently, the percolation path is cut off at high endurance. On the other hand, the proposed changing reset voltage suppresses the crosswise expansion of the filament and suppresses the reduction of the V O density inside the filament because of lower V RESET at high endurance.…”

Section: Physical Modelmentioning

confidence: 99%

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85% endurance error reduction and data-retention lifetime enhancement by changing the reset voltage in 40 nm TaO _X -based ReRAM

Kinoshita

Yonai

Takeuchi

2020

Jpn. J. Appl. Phys.

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This paper proposes a changing reset voltage technique for 40 nm TaOX-based resistive random access memories (ReRAM). In the proposed technique, reset voltage (VRESET) changes at high endurance such as 104 set/reset cycles. The changing reset voltage technique decreases the measured total bit-error rate (BER) of both the low resistance state (LRS) and high resistance state (HRS) by 85%, compared with conventional fixed reset voltage. In addition, the current difference between LRS and HRS at probability = 50% (window) increases by 57% with the proposed technique, which increases the read margin between set and reset. Moreover, by decreasing the tail bits and expanding the read margin, the data-retention lifetime is increased. As a result, the changing reset voltage technique is recommended for high endurance and long data retention lifetime. Finally, this paper proposes a physical model of the proposed technique.

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“…The formation of conductive filaments in TaO x -ReRAM devices plays a fundamental role in defining their functionality. Recently, long-term and robust retentions have been demonstrated in TaO x -ReRAMs, which were attributed to the stability of the conductive filaments. − Moreover, depending on the conditions of these filaments, analog resistive switching has been reported in TaO x -ReRAMs. − This has led to numerous high-resolution investigations of the conductive filaments using scanning probe microscopy (SPM), − transmission electron microscopy (TEM), − and photo electron emission microscopy. , As a result, different resistive switching mechanisms in TaO x -ReRAMs have been proposed in the literature. While some studies attributed the resistance changes to the migration of oxygen vacancies − ,, and the alternation of composition from TaO 2 to Ta 2 O 5 in the filaments, − others reported the migration of tantalum and oxygen atoms during resistance switches, using scanning tunneling microscopy (STM) measurements .…”

Section: Introductionmentioning

confidence: 99%

Visualizing the Local Composition Changes during Resistive Switching in Planar TaOx-ReRAMs

Naitoh

Shima

Akinaga

2023

ACS Appl. Electron. Mater.

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Resistive random-access memory (ReRAM) is an attractive concept for the advancement of computing capabilities. TaO x -ReRAMs are among the best candidate devices for resistive switching applications owing to their two stable phases of TaO 2 and Ta 2 O 5 . However, the difficulty in localizing the conductive filaments and observing specific local structural and compositional changes in the conventional 3D stacked-junction architecture of ReRAM devices denies a clear understanding of the resistive switching mechanism. Herein, we describe the fabrication of a planar nanogap-based Ta/TaO x /Pt ReRAM junction to investigate the local compositional changes during direct resistive switching. Our results emphasize the role of the tantalum atoms' mobility during the formation of conductive filaments and after the first reset operation. We demonstrate the migration of tantalum atoms during the resistive switching, evidenced by the formation of pure tantalum pillars. Our nanoscale elemental analysis helps elucidate the mechanism of resistance changes in planar TaO x -ReRAMs via direct visualization of the local compositional changes.

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Improvement of Endurance and Data-retention in 40nm TaO<inf>X</inf>-based ReRAM by Finalize Verify

Cited by 4 publications

References 7 publications

Tiny and error-tolerant ConvLSTM for event-based vision sensor with optimized event representation and ReRAM computation-in-memory

Tiny and error-tolerant ConvLSTM for event-based vision sensor with optimized event representation and ReRAM computation-in-memory

85% endurance error reduction and data-retention lifetime enhancement by changing the reset voltage in 40 nm TaO _X -based ReRAM

Visualizing the Local Composition Changes during Resistive Switching in Planar TaOx-ReRAMs

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Improvement of Endurance and Data-retention in 40nm TaO<inf>X</inf>-based ReRAM by Finalize Verify

Cited by 4 publications

References 7 publications

Tiny and error-tolerant ConvLSTM for event-based vision sensor with optimized event representation and ReRAM computation-in-memory

Tiny and error-tolerant ConvLSTM for event-based vision sensor with optimized event representation and ReRAM computation-in-memory

85% endurance error reduction and data-retention lifetime enhancement by changing the reset voltage in 40 nm TaO X -based ReRAM

Visualizing the Local Composition Changes during Resistive Switching in Planar TaOx-ReRAMs

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85% endurance error reduction and data-retention lifetime enhancement by changing the reset voltage in 40 nm TaO _X -based ReRAM