Improvement of Multimedia Performance Based on 3-D Stacking Memory Architecture and Software Refinement

Abstract

The three-dimensional (3-D) stacking memory is good way to extend the local memory of embedded CPU and/or DSP by the through-silicon-vias (TSVs) technology. In this work, we show a multi-core system with 3-D stacking memory, and the stacking memory can be configured as instruction cache or local data memory for each DSP core. Due to the noncacheable property of local memory, the programmers have to rethink the software algorithm and the data structure to efficiently use the extended memory space. To demonstrate the performance enhancement of 3-D system, this paper presents three enhanced multimedia applications for HW/SW cosimulation by the electronic system-level (ESL) virtual platform. According to the experimental results, the 3-D system performance can be improved by 30%~50% for assembly coded single-channel H.264 decoder and multichannel H.264 decoder respectively, compared with traditional 2-D system. In addition, for a JPEG decoder compiled with C compiler, more than 6 times system performance can be improved by placing the data section, heap and stack structure from external DDR2 memory to the 3-D stacking memory.

A case study: 3-D stacked memory system architecture exploration by ESL virtual platform

“…A 512KB SRAM model is considered in this work, in other words, the whole AXI sub-system have shared 512KB memory in the Architecture A) and/or each DSP core accesses a half of the capacity in the Architecture B) and C). The detail implementation of the application can refer to [8]. Figure 3 shows the demonstration of the four-channel H.264 decoding application.…”