Improving energy gains of inexact DSP hardware through reciprocative error compensation

Abstract

We present a zero hardware-overhead design approach called reciprocative error compensation(REC) that significantly enhances the energy-accuracy trade-off gains in inexact signal processing datapaths by using a two-pronged approach: (a) deliberately redesigning the basic arithmetic blocks to effectively compensate for each other's (expected) error through inexact logic minimization, and (b) "reshaping" the response waveforms of the systems being designed to further reduce any residual error. We apply REC to several DSP primitives such as the FFT and FIR filter blocks, and show that this approach delivers 2-3 orders of magnitude lower (expected) error and more than an order of magnitude lesser Signal-to-Noise Ratio (SNR) loss (in dB) over the previously proposed inexact design techniques, while yielding similar energy gains. Post-layout comparisons in the 65nm process technology show that our REC approach achieves upto 73% energy savings (with corresponding delay and area savings of upto 16% and 62% respectively) when compared to an existing exact DSP implementation while trading a relatively small loss in SNR of less than 1.5 dB.

An Optimum Inexact Design for an Energy Efficient Hearing Aid

“…Probabilistic Pruning [22][23][24] is an inexact design technique that exploits the knowledge of the significance of a circuit component and its switching probability during circuit operation to derive a systematic approach to prune the "least useful" components in a circuit. When applied on data path elements, this technique has been shown to achieve significant savings ranging between 30%-50% in all of energy, delay and area without any implementation overheads in hardware for acceptable losses in the accuracy of the outputs.…”

Perceptually guided inexact DSP design for power, area efficient hearing aid

“…Probabilistic Pruning [1], [2] is an inexact design technique that exploits the knowledge of the significance of a circuit component to derive a systematic approach to prune the "least useful" components in a circuit. In this paper, we will use this technique as the basis for introducing "inexactness" and enabling the energy-accuracy tradeoffs.…”

“…The ability of human compensatory neurocognitive processing to tolerate relatively less accurate inputs may provide an excellent opportunity to lower the power and area requirement of processors in assistive devices by deliberately introducing errors in computation. This novel approach termed as inexact design has proved to yield significant gains in the context of hardware for DSP primitives [1], atmospheric modelling [3], MPEG coding [4] and recognition and classification tasks [5].…”

Inexactness and a future of computing

“…While initial work explored the usage of voltage over scaled circuits as the means for introducing error in a wide range of signal and video processing hardware (such as discrete cosine transform [28] and motion estimation [29]), the notion of significance-driven voltage was used to explore inexact design optimizations spanning multiple layers of design abstraction. For instance, scalable-effort hardware [30] combines voltage over scaling (physical-layer), precision-reduction (architectural-layer) and computation reductions (algorithm-layer) to maximize the resource efficiency gains, and a reciprocative error compensation frameworks [33] provide an optimization framework for tuning the coefficients of the DSP blocks to hide inexactness from the underlying building blocks. Continuing, a recent body of work further explored and demonstrated the potential of inexact computing in the context of emerging recognition, mining and synthesis (RMS) workloads where they have shown that 67-96% of these applications' execution is spent in kernels that can accept and live with inexactness in a significant manner [34].…”