Improving FPGA Placement With Dynamically Adaptive Stochastic Tunneling

Lin, Mingjie; Wawrzynek, John

doi:10.1109/tcad.2010.2061670

Cited by 15 publications

(6 citation statements)

References 36 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…The stochastic approaches involve randomness to perform their search process. The simulated annealing [14], Monte Carlo sampling [15], stochastic tunneling [16], and parallel tempering [17], Genetic Algorithm (GA) [18], Evolutionary Strategies (ES) [19], Evolutionary Programming (EP) [20], Particle Swarm Optimization (PSO) [23], Ant Colony Optimization (ACO) [25] and dierential evolution (DE) [26], Krill herd algorithms [35,36,37], Monarch buttery optimization [38], Earthworm optimization algorithm [39], Plant propagation algorithm (PPA) [40,41,42,43] are stochastic nature based optimization methods. Evolutionary computation is the collective name of these algorithms inspired by biological process of evolution, such as natural selection and genetic inheritance [44].…”

Section: Subject Tomentioning

confidence: 99%

Hybrid Genetic Algorithms for Global Optimization Problems

Asim¹

2017

HJMS

View full text Add to dashboard Cite

In the last two decades the eld evolutionary computation has become a mainstream and several types of evolutionary algorithms are developed for solving optimization and search problems. Evolutionary algorithms (EAs) are mainly inspired from the biological process of evolution. They do not demand for any concrete information such as continuity or dierentiability and other information related to the problems to be solved. Due to population based nature, EAs provide a set of solutions and share properties of adaptation through an iterative process. The steepest descent methods and Broyden-Fletcher-Goldfarb-Shanno (BFGS),Hill climbing local search are quite often used for exploitation purposes in order to improve the performance of the existing EAs. In this paper, We have employed the BFGS as an additional operator in the framework of Genetic Algorithm. The idea of add-in BFGS is to sharpen the search around local optima and to speeds up the search process of the suggested algorithm. We have used 24 benchmark functions which was designed for the special session of the 2005 IEEE-Congress on Evolutionary Computation (IEEE-CEC 06) to examine the performance of the suggested hybrid GA. The experimental results provided by HGBA are much competitive and promising as compared to the stand alone GA for dealing with most of the used test problems

show abstract

Section: Subject Tomentioning

confidence: 99%

Hybrid Genetic Algorithms for Global Optimization Problems

Asim¹

2017

HJMS

View full text Add to dashboard Cite

show abstract

“…Fifth one is the Stochastic Tunneling Approach [13]: The Dynamically adaptive stochastic tunneling (DAST) algorithm is to avoid the "freezing" problem commonly found when using simulated annealing for circuit placement on field programmable gate arrays (FPGAs). The placement is achieved by allowing the DAST placer to tunnel energetically inaccessible regions of the potential solution space.…”

Section: Existing Algorithmsmentioning

confidence: 99%

Multi-Objective Memetic Algorithm for FPGA Placement Using Parallel Genetic Annealing

Praveen¹,

Kumar²

2016

IJISA

View full text Add to dashboard Cite

Due to advancement in reconfigurable computing, Field Programmable Gate Array (FPGA) has gained significance due to its low cost and fast prototyping. Parallelism, specialization, and hardware level adaptation, are the key features of reconfigurable computing. FPGA is a programmable chip that can be configured or reconfigured by the designer, to implement any digital circuit. One major challenge in FPGA design is the Placement problem. In this placement phase, the logic functions are assigned to specific cells of the circuit. The quality of the placement of the logic blocks determines the overall performance of the logic implemented in the circuits. The Placement of FPGA is a Multi-Objective Optimization problem that primarily involves minimization of three or more objective functions. In this paper, we propose a novel strategy to solve the FPGA placement problem using Non-dominated Sorting Genetic Algorithm (NSGA-II) and Simulated Annealing technique. Experiments were conducted in Multicore Processors and metrics such as CPU time were measured to test the efficiency of the proposed algorithm. From the experimental results, it is evident that the proposed algorithm reduces the CPU consumption time to an average of 15% as compared to the Genetic Algorithm, 12% as compared to the Simulated Annealing, and approximately 6% as compared to the Genetic Annealing algorithm.

show abstract

“…, where DCT(i, j) denotes the DCT transform results at index i and j. Because the simulated annealing methods have been widely used in FPGA placements [55], we omit all implementation details of the simulated annealing. Instead, we focus on the choice of cost functions for both methods.…”

Section: Graph Mappingmentioning

confidence: 99%

Stochastically Estimating Modular Criticality in Large-Scale Logic Circuits Using Sparsity Regularization and Compressive Sensing

Alawad

DeMara

Lin

2015

JLPEA

Self Cite

View full text Add to dashboard Cite

This paper considers the problem of how to efficiently measure a large and complex information field with optimally few observations. Specifically, we investigate how to stochastically estimate modular criticality values in a large-scale digital circuit with a very limited number of measurements in order to minimize the total measurement efforts and time. We prove that, through sparsity-promoting transform domain regularization and by strategically integrating compressive sensing with Bayesian learning, more than 98% of the overall measurement accuracy can be achieved with fewer than 10% of measurements as required in a conventional approach that uses exhaustive measurements. Furthermore, we illustrate that the obtained criticality results can be utilized to selectively fortify large-scale digital circuits for operation with narrow voltage headrooms and in the presence of soft-errors rising at near threshold voltage levels, without excessive hardware overheads. Our numerical simulation results have shown that, by optimally allocating only 10% circuit redundancy, for some large-scale benchmark circuits, we can achieve more than a three-times reduction in its overall error probability, whereas if randomly distributing such 10% hardware resource, less than 2% improvements in the target circuit's overall robustness will be observed. Finally, we conjecture that our proposed approach can be readily applied to estimate other essential properties of digital circuits that are critical to designing and analyzing them, such as the observability measure in reliability analysis and the path delay estimation in stochastic timing analysis. The only key requirement of our proposed methodology is that these global J. Low Power Electron. Appl. 2015, 5 4 information fields exhibit a certain degree of smoothness, which is universally true for almost any physical phenomenon.

show abstract

Improving FPGA Placement With Dynamically Adaptive Stochastic Tunneling

Cited by 15 publications

References 36 publications

Hybrid Genetic Algorithms for Global Optimization Problems

Hybrid Genetic Algorithms for Global Optimization Problems

Multi-Objective Memetic Algorithm for FPGA Placement Using Parallel Genetic Annealing

Stochastically Estimating Modular Criticality in Large-Scale Logic Circuits Using Sparsity Regularization and Compressive Sensing

Contact Info

Product

Resources

About