2017 IEEE Wireless Communications and Networking Conference (WCNC) 2017
DOI: 10.1109/wcnc.2017.7925593
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Improving Power Consumption for Cellular-Based Machine-Type Communication Systems

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“…The multiplication operation that generates the code word is the primary stone for designing the logic circuit for the LDPC encoder. As a result, following the design steps of previous studies [37][38][39][40], it can be noticed that multiplication is represented by a logical AND gate, and a logical XOR gate represents module-2 addition. Figure 4 demonstrates the initial encoder logic circuit for only generating the first parity bit (p1).…”
Section: Figure 3 Ldpc Encoder Flowchartmentioning
confidence: 99%
“…The multiplication operation that generates the code word is the primary stone for designing the logic circuit for the LDPC encoder. As a result, following the design steps of previous studies [37][38][39][40], it can be noticed that multiplication is represented by a logical AND gate, and a logical XOR gate represents module-2 addition. Figure 4 demonstrates the initial encoder logic circuit for only generating the first parity bit (p1).…”
Section: Figure 3 Ldpc Encoder Flowchartmentioning
confidence: 99%