Improving symbolic analysis in CMOS analog integrated circuits

Aguila-Meza, J.; Torres-Papaqui, L.; Tielo-Cuautle, E.

doi:10.1109/iscas.2004.1329495

Cited by 2 publications

(2 citation statements)

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“…In this manner, for a nullor circuit, the computation of a SE is reduced to the manipulation of the 3. Apply compacted nodal analysis (CNA) to formulate a CSEs given by It is worth to mention that to eliminate non-dominant symbolic terms before the formulation of a CSEs, SIASCA selects the appropriate model to each active device, by considering their biasing and frequency operating conditions by applying heuristic reasoning rules [8]. Furthermore, noise analysis is performed by applying CNA to nullor circuits whose noise sources are added according to the noise models of each active device [2], [9].…”

Section: Stage Of Analysismentioning

confidence: 99%

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SIASCA: Interactive System for the Symbolic Analysis of Analog Circuits

Tlelo-Cuautle

Quintanar-Ramos

Gutiérrez-Pérez

et al. 2004

IEICE Electron. Express

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To improve analog design automation (ADA) of electronic circuits, an interactive system for symbolic analysis called SIASCA is introduced. SIASCA includes schematic capture of a more general class of analog circuits, namely: operational transconductance amplifiers and current conveyors. The options of analysis are focused on calculating simplified symbolic expressions (SEs), representing the dominant behavior of a circuit, for AC and noise analysis. To minimize complexity in manipulating SEs, all active devices are modeled at different levels of abstraction by using nullors. Several examples demonstrate the suitability and usefulness of SIASCA to be used within ADA environments.

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Section: Stage Of Analysismentioning

confidence: 99%

“…For transistor circuits [8], lets consider the schematic capture of the common source amplifier shown in Fig. 3.…”

Section: Examplesmentioning

confidence: 99%