InAlN - A new barrier material for GaN-based HEMTs

Kohn, E.; Medjdoub, Farid

doi:10.1109/iwpsd.2007.4472506

Cited by 25 publications

(20 citation statements)

References 17 publications

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“…In order to achieve high-speed GaN devices, lattice-matched InAlN barrier layers were proposed, with which 2DEG carrier density is much higher than AlGaN barrier HEMTs, namely due to the spontaneous polarization [1,2]. However, the growth of InAlN is limited by the high immiscibility between AlN and InN, which results in alloy scattering and elevated interface roughness due to clustering in InAlN.…”

Section: Introductionmentioning

confidence: 99%

InAlGaN/GaN HEMTs at Cryogenic Temperatures

et al. 2016

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Abstract:We report on the electron transport properties of two-dimensional electron gas confined in a quaternary barrier InAlGaN/AlN/GaN heterostructure down to cryogenic temperatures for the first time. A state-of-the-art electron mobility of 7340 cm 2¨V´1¨s´1 combined with a sheet carrier density of 1.93ˆ10 13 cm´2 leading to a remarkably low sheet resistance of 44 Ω/˝are measured at 4 K. A strong improvement of Direct current (DC) and Radio frequency (RF) characteristics is observed at low temperatures. The excellent current and power gain cutoff frequencies (f T /f max ) of 65/180 GHz and 95/265 GHz at room temperature and 77 K, respectively, using a 0.12 µm technology confirmed the outstanding 2DEG properties.

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Section: Introductionmentioning

confidence: 99%

InAlGaN/GaN HEMTs at Cryogenic Temperatures

et al. 2016

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“…Also a reduction of the surface barrier height of the AlInN barrier layer by deposition of a SiN cap, as recently suggested by [8] for SiN/AlGaN/GaN heterostructures, might lead to this finding. Further, the lower n S of sample A without SiN cap might be due to an oxidized surface and consequently reduced effective barrier layer thickness as reported in [9]. No well founded explanation for the higher µ e with increasing SiN cap thickness can be presented here.…”

Section: Methodsmentioning

confidence: 66%

“…While SiN is up to now mostly deposited ex-situ by plasma-enhanced chemical vapour deposition (PECVD), in situ SiN deposition on AlGaN/GaN HEMT structures by metal-organic vapour phase epitaxy (MOVPE) was recently shown to be feasible and advantageous mainly due to reduced AlGaN relaxation, increased n S , improved ohmic contacts and surface protection during processing [7,8]. For AlInN HEMT structures, in situ deposition of SiN should furthermore prevent oxidation of the surface which has been reported to lead to reduced effective barrier thickness and 2DEG density [9]. This becomes especially important when the barrier thickness approaches the tunnelling limit.…”

Section: Introductionmentioning

confidence: 99%

In situ SiN passivation of AlInN/GaN heterostructures by MOVPE

Behmenburg

Khoshroo

Mauder

et al. 2010

Phys. Status Solidi (c)

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AlInN is being considered to replace AlGaN as barrier material in high‐electron mobility transistors (HEMT) mainly due to the possibility to downscale the barrier layer thickness at coexistent higher drain current density. However, the stability of surface conditions which can strongly influence the electrical properties of the device has to be assured. In situ deposition of a SiN passivation layer by metal‐organic vapour phase epitaxy (MOVPE) is therefore a promising candidate to improve the device structure. In this paper, heterostructures with thin AlInN barrier passivated by in situ deposition of SiN layers of different thicknesses are presented. As expected, deterioration of the sheet resistance (RSh) was observed for the reference sample without SiN passivation layer by continuously performed RSh mappings of the investigated wafer. This change is noticeably reduced for samples with in situ SiN passivation layer. A comparison of two wafers, stored either with or without air exposure, reveals oxidation as presumable reason for the deterioration. Further, results from RSh measurements on processed wafers indicate an enhanced RSh stability during process for SiN‐capped samples. (© 2010 WILEY‐VCH Verlag GmbH & Co. KGaA, Weinheim)

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“…Gallium nitride (GaN) as channel material is an alternative to overcome these limitations because of its low effective mass hence mobility is inversely proportional to carrier effective mass. The GaN material has high thermal stability, high power density and robustness [18]. To overcome the SCEs of GaN-based DG-MOSFETs the underlap length is extended in both source and drain sides that increases the effective channel length, thereby increasing the series resistance in underlap regions.…”

Section: Introductionmentioning

confidence: 99%

Projected Performance of Sub-10 nm GaN-based Double Gate MOSFETs

Faisal¹,

Hasan²,

Hossain³

et al. 2017

CCS Archive

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GaN-based double gate metal-oxide semiconductor fieldeffect transistors (DG-MOSFETs) in sub-10 nm regime have been designed for the next generation logic applications. To rigorously evaluate the device performance, non-equilibrium Green's function formalism are performed using SILVACO ATLAS. The device is turn on at gate voltage, V GS =1 V while it is going to off at V GS = 0 V. The ON-state and OFFstate drain currents are found as 12 mA/μm and ~10-8 A/μm, respectively at the drain voltage, V DS = 0.75 V. The subthreshold slope (SS) and drain induced barrier lowering (DIBL) are ~69 mV/decade and ~43 mV/V, which are very compatible with the CMOS technology. To improve the figure of merits of the proposed device, source to gate (S-G) and gate to drain (G-D) distances are varied which is mentioned as underlap. The lengths are maintained equal for both sides of the gate. The SS and DIBL are decreased with increasing the underlap length (L UN ). Though the source to drain resistance is increased for enhancing the channel length, the underlap architectures exhibit better performance due to reduced capacitive coupling between the contacts (S-G and G-D) which minimize the short channel effects. Therefore, the proposed GaN-based DG-MOSFETs as one of the excellent promising candidates to substitute currently used MOSFETs for future high speed applications.

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InAlN - A new barrier material for GaN-based HEMTs

Cited by 25 publications

References 17 publications

InAlGaN/GaN HEMTs at Cryogenic Temperatures

InAlGaN/GaN HEMTs at Cryogenic Temperatures

In situ SiN passivation of AlInN/GaN heterostructures by MOVPE

Projected Performance of Sub-10 nm GaN-based Double Gate MOSFETs

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