1999
DOI: 10.1149/1.1392001
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Influence of Coil Power on the Etching Characteristics in a High Density Plasma Etcher

Abstract: Structures fabricated using surface processing technology are limited to spanning no more than a few hundred microns due to stresses normal to the wafer surface. In contrast, high aspect ratio structures (HARS) are rigid in the out-of-plane direction, 1 but compliant in the plane of the wafer, and are able to span larger distances. HARS can also achieve high lateral capacitances due to large surface area, making it possible to generate large electrostatic forces. The advantages of HARS are exploited in a wide … Show more

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Cited by 69 publications
(38 citation statements)
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“…The photoresist layer was developed by immersion of 30 s in "dirty" developer and 25 s in "clean" developer. Subsequently, the Bosch process [44] was applied at a rate of 20 mm min À1 . Photoresist stripping was carried out by rinsing with acetone, followed by treatment with HNO 3 for 20 min, and a few minutes of O 2 plasma exposure.…”
Section: Microchipsmentioning
confidence: 99%
“…The photoresist layer was developed by immersion of 30 s in "dirty" developer and 25 s in "clean" developer. Subsequently, the Bosch process [44] was applied at a rate of 20 mm min À1 . Photoresist stripping was carried out by rinsing with acetone, followed by treatment with HNO 3 for 20 min, and a few minutes of O 2 plasma exposure.…”
Section: Microchipsmentioning
confidence: 99%
“…DRIE uses these same principles and repeated isotropic and sidewall passivation/protection steps to achieve not only a high aspect ratio, but also higher etch rates, thus allowing structures to be fabricated with dimensions comparable to the wafer thickness [47], [48], [76].…”
Section: A Dimensionsmentioning
confidence: 99%
“…An exception is DRIE, where the alternating etch and passivation steps creates a scalloping of the sidewalls and roughness up to the micron level [47], [48]. In anisotropic wet etching, the side-walls can be aligned with crystallographic planes and the resulting roughness can be of atomic magnitude.…”
Section: B Tolerancementioning
confidence: 99%
“…Micromasking effect is caused by the presence of unwanted foreign particles on the substrate surface [19][20][21][22][23][24]. During the silicon etching process, these foreign particles act as a mask and protect the silicon beneath them.…”
Section: Introductionmentioning
confidence: 99%