Influence of Conduction Band Offsets at Window/Buffer and Buffer/Absorber Interfaces on the Roll-Over of J-V Curves of CIGS Solar Cells

Alkali treatments of Cu(In,Ga)Se2 thin‐film absorbers and their impact on transport barriers

“…In a second step, we employ different transport models at the front and rear of the cell: thermionic emission for electrons across the barrier at the window/buffer interface, and a Schottky contact for holes at the rear contact, respectively. Further details of these simulations are presented elsewhere . The conduction band edge in the window layer is initially assumed to be continuous, which is representative of a standard ZnO window stack (ZnO:Al + i‐ZnO).…”

“…Further details of these simulations are presented elsewhere. 45 The conduction band edge in the window layer is initially assumed to be continuous, which is representative of a standard ZnO window stack (ZnO:Al + i-ZnO). We then introduce a conduction band discontinuity also within the window stack in order to describe devices with a (Zn,Mg)O layer instead of the standard i-ZnO.…”

“…Simulations of the illuminated IV characteristics (not shown here) demonstrate that a conduction band spike at the absorber/buffer interface mainly acts as an extraction barrier, which results in a blocked photo‐generated current for voltages below the open‐circuit voltage V oc , and thus mainly reduces the fill factor. The absorber/buffer offset Δ E A/B is thus constrained by the experimental illuminated IV curves, which do not show such a loss in fill factor, and Δ E A/B cannot be arbitrarily increased to describe the current blocking in high forward bias beyond V oc . The cliff at the buffer/window interface, on the other hand, has virtually no influence on the photo‐generated current, and high values of Δ E B/W cause a dramatic suppression of the forward diode current.…”

Can we see defects in capacitance measurements of thin‐film solar cells?

“…interfaces, which means that the measured device capacitance typically cannot be attributed to the SCR alone. This complex device geometry might thus require a complex electrical equivalent circuit [6][7][8][9][10][11] to even identify the SCR capacitance from the measurement. On the other hand, inter-diffusion of mobile species between the thin layers in the device stack [12][13][14][15][16][17][18] likely results in graded interfaces, where electronic properties could vary drastically with depth.…”

“…We recently presented a number of studies on the electronic properties and resulting capacitance spectra of CIGS solar cells, where we combined Hall measurements, 18,40 ac impedance measurements under varying experimental conditions (frequency, temperature, bias voltage, illumination, and time), 10,17 temperature-dependent current-voltage measurements, 30 numerical device simulations, 9,30,41 and deliberate variations in absorber chemistry 30 and layer stack architecture 10,11,17,30 in an attempt to establish a consistent understanding of the electronic properties of these particular devices. We concluded that the universality of the N1 signal and typical doping profiles-for CIGS solar cells fabricated in our laboratory-are most likely linked to the deposition of the standard CdS/ZnO buffer/window layer stack onto the CIGS absorber, resulting in most cases in a transport barrier 10,11,30 (causing a capacitance step) and formation of additional donor-type defects near the interface (reducing net dopant concentration near the interface).…”